[U-Boot] u-boot hangs after calling icache_enable()

[Dan May]

Hi,

I am attempting to load u-boot onto a board that is similar to an
existing design that does not use u-boot.

I suspect that the issue lies in the SDRAM initialization or UPM,
but since I have been looking at this issue for about a week
I thought I would see if anyone has any suggestions on what to
look at in regards to the SDRAM or anything else I might have
missed.

Board information:

  MPC875
  Micron MT48LC4M32B2 - 16 MB SDRAM
  66 MHz oscillator
  66 MHz bus
  32 bit wide data bus
  
Immediately after the SDRAM is initialized, I can successfully
write and read values over the entire memory space.  However,
once icache_enable() is called, it seems to "get lost" (sometimes
running code in xyzModem).

If I set the Burst Inhibit bit in the OR1 register, u-boot
successfully runs to the point where it is looking for an image.

My guess is that single reads are being used until the icache is
enabled and then the CPU is using a burst read to fill the 
instruction cache (which is not working right).

One thing about the UPM that is not clear based on the
documentation is whether the Next Address (NA) bit in the
RAM words is necessary during burst read.

The MPC885 Reference Manual example shows the bit being
set, but the Micron Technical Note TN-48-12 does not.  Is it
necessary for this bit to be used?

    Thanks,
             Dan