[U-Boot] [PATCH 02/11] at91: Add USART & DBGU base address defines

Alexander Stein alexander.stein at systec-electronic.com
Mon Nov 1 09:29:46 CET 2010


Signed-off-by: Alexander Stein <alexander.stein at systec-electronic.com>
---
 arch/arm/include/asm/arch-at91/at91cap9.h    |   12 ++++++++----
 arch/arm/include/asm/arch-at91/at91sam9260.h |    7 +++++++
 arch/arm/include/asm/arch-at91/at91sam9261.h |    4 ++++
 arch/arm/include/asm/arch-at91/at91sam9263.h |    3 +++
 arch/arm/include/asm/arch-at91/at91sam9g45.h |    5 +++++
 arch/arm/include/asm/arch-at91/at91sam9rl.h  |    4 ++++
 6 files changed, 31 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91cap9.h b/arch/arm/include/asm/arch-at91/at91cap9.h
index 5af6fdc..f109c66 100644
--- a/arch/arm/include/asm/arch-at91/at91cap9.h
+++ b/arch/arm/include/asm/arch-at91/at91cap9.h
@@ -53,10 +53,14 @@
 #define AT91CAP9_ID_IRQ0	30	/* Advanced Interrupt Controller (IRQ0) */
 #define AT91CAP9_ID_IRQ1	31	/* Advanced Interrupt Controller (IRQ1) */
 
-#define AT91_PIO_BASE	0xfffff200
-#define AT91_PMC_BASE	0xfffffc00
-#define AT91_RSTC_BASE	0xfffffd00
-#define AT91_PIT_BASE	0xfffffd30
+#define AT91_USART0_BASE	0xfff8c000
+#define AT91_USART1_BASE	0xfff90000
+#define AT91_USART2_BASE	0xfff94000
+#define AT91_DBGU_BASE		0xffffee00
+#define AT91_PIO_BASE		0xfffff200
+#define AT91_PMC_BASE		0xfffffc00
+#define AT91_RSTC_BASE		0xfffffd00
+#define AT91_PIT_BASE		0xfffffd30
 
 #ifdef CONFIG_AT91_LEGACY
 
diff --git a/arch/arm/include/asm/arch-at91/at91sam9260.h b/arch/arm/include/asm/arch-at91/at91sam9260.h
index cb34a94..4b1b09f 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9260.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9260.h
@@ -49,10 +49,17 @@
 #define AT91SAM9260_ID_IRQ1	30	/* Advanced Interrupt Controller (IRQ1) */
 #define AT91SAM9260_ID_IRQ2	31	/* Advanced Interrupt Controller (IRQ2) */
 
+#define AT91_USART0_BASE	0xfffb0000
+#define AT91_USART1_BASE	0xfffb4000
+#define AT91_USART2_BASE	0xfffb8000
 #define AT91_EMAC_BASE		0xfffc4000
+#define AT91_USART3_BASE	0xfffd0000
+#define AT91_USART4_BASE	0xfffd4000
+#define AT91_USART5_BASE	0xfffd8000
 #define AT91_SDRAMC_BASE	0xffffea00
 #define AT91_SMC_BASE		0xffffec00
 #define AT91_MATRIX_BASE	0xffffee00
+#define AT91_DBGU_BASE		0xfffff200
 #define AT91_PIO_BASE		0xfffff400
 #define AT91_PMC_BASE		0xfffffc00
 #define AT91_RSTC_BASE		0xfffffd00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h
index 7ca0283..49be91f 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9261.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9261.h
@@ -43,9 +43,13 @@
 #define AT91SAM9261_ID_IRQ1	30	/* Advanced Interrupt Controller (IRQ1) */
 #define AT91SAM9261_ID_IRQ2	31	/* Advanced Interrupt Controller (IRQ2) */
 
+#define AT91_USART0_BASE	0xfffb0000
+#define AT91_USART1_BASE	0xfffb4000
+#define AT91_USART2_BASE	0xfffb8000
 #define AT91_SDRAMC_BASE	0xffffea00
 #define AT91_SMC_BASE		0xffffec00
 #define AT91_MATRIX_BASE	0xffffee00
+#define AT91_DBGU_BASE		0xfffff200
 #define AT91_PIO_BASE		0xfffff400
 #define AT91_PMC_BASE		0xfffffc00
 #define AT91_RSTC_BASE		0xfffffd00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h
index 4ada1ce..cdda301 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9263.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9263.h
@@ -47,6 +47,9 @@
 #define AT91SAM9263_ID_IRQ0	30	/* Advanced Interrupt Controller (IRQ0) */
 #define AT91SAM9263_ID_IRQ1	31	/* Advanced Interrupt Controller (IRQ1) */
 
+#define AT91_US0_BASE		0xfff8c000
+#define AT91_US1_BASE		0xfff90000
+#define AT91_US2_BASE		0xfff94000
 #define AT91_EMAC_BASE		0xfffbc000
 #define AT91_ECC0_BASE		0xffffe000
 #define AT91_SDRAMC0_BASE	0xffffe200
diff --git a/arch/arm/include/asm/arch-at91/at91sam9g45.h b/arch/arm/include/asm/arch-at91/at91sam9g45.h
index 445f4b2..b6767fd 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9g45.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9g45.h
@@ -51,9 +51,14 @@
 #define AT91SAM9G45_ID_VDEC	30	/* Video Decoder */
 #define AT91SAM9G45_ID_IRQ0	31	/* Advanced Interrupt Controller */
 
+#define AT91_USART0_BASE	0xfff8c000
+#define AT91_USART1_BASE	0xfff90000
+#define AT91_USART2_BASE	0xfff94000
+#define AT91_USART3_BASE	0xfff98000
 #define AT91_EMAC_BASE		0xfffbc000
 #define AT91_SMC_BASE		0xffffe800
 #define AT91_MATRIX_BASE	0xffffea00
+#define AT91_DBGU_BASE		0xffffee00
 #define AT91_PIO_BASE		0xfffff200
 #define AT91_PMC_BASE		0xfffffc00
 #define AT91_RSTC_BASE		0xfffffd00
diff --git a/arch/arm/include/asm/arch-at91/at91sam9rl.h b/arch/arm/include/asm/arch-at91/at91sam9rl.h
index 8eb0d4f..ffa6687 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9rl.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9rl.h
@@ -44,6 +44,10 @@
 #define AT91SAM9RL_ID_AC97C	24	/* AC97 Controller */
 #define AT91SAM9RL_ID_IRQ0	31	/* Advanced Interrupt Controller (IRQ0) */
 
+#define AT91_US0_BASE		0xfffb0000
+#define AT91_US1_BASE		0xfffb4000
+#define AT91_US2_BASE		0xfffb8000
+#define AT91_US3_BASE		0xfffbc000
 #define AT91_SDRAMC_BASE	0xffffea00
 #define AT91_SMC_BASE		0xffffec00
 #define AT91_MATRIX_BASE	0xffffee00
-- 
1.7.2.2



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