[U-Boot] [PATCH] support for 2 DRAM banks and FLASH bank with 16MB in KS8695

[Bernstein, Michael]

Hello,

The patch attached add support for a flash bank size of 16 MB and for a second DRAM bank for the KS8695 (ARM9 core) depending on the configuration.

A better solution would be to calculate the values for the registers (only some shifts are needed) but this was the lazy implementation.

I hope, I don't make to much mistakes in the presentation of my patch because it is the first patch I publish to this list. Sadly I don't have access to the development PC any more because it was a project for a subsidiary company and I finished the project at end of September.


Signed-off-by: Michael Bernstein <Michael.Bernstein at controlware.de>

---

diff --unified --recursive --new-file u-boot-2009.11/cpu/arm920t/ks8695/lowlevel_init.S u-boot-2009.11.new/cpu/arm920t/ks8695/lowlevel_init.S
--- u-boot-2009.11/cpu/arm920t/ks8695/lowlevel_init.S   2009-12-15 23:20:54.000000000 +0100
+++ u-boot-2009.11.new/cpu/arm920t/ks8695/lowlevel_init.S       2010-01-29 11:38:04.000000000 +0100
@@ -96,7 +96,17 @@
        str     r2, [r1]                /* large flash map */
        ldr     pc, =(highflash+0x02000000-0x00f00000)  /* jump to high flash address */
 highflash:
-       ldr     r2, =0x8fe00040
+#if (PHYS_FLASH_BANK_SIZE == 0x01000000)
+       ldr     r2, =0xbfe00071         /* 16MB and start at 32MB */
+       str     r2, [r1]                /* remap flash range */
+       ldr     r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL1)
+       ldr     r2, =0xc0300000
+       str     r2, [r1]                /* flash2 region unused */
+       ldr     r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
+       ldr     r2, =0x30000003         /* data width 32 */
+       str     r2, [r1]                /* enable first flash select */
+#else
+       ldr     r2, =0x8fe00040         /* 4MB start at 32MB */
        str     r2, [r1]                /* remap flash range */

        /*
@@ -111,6 +121,7 @@
        ldr     r1, =(KS8695_IO_BASE+KS8695_MEM_GENERAL)
        ldr     r2, =0x30000005
        str     r2, [r1]                /* enable both flash selects */
+#endif

 #ifdef CONFIG_CM41xx
        /*
@@ -138,7 +149,15 @@
 #endif
        str     r2, [r1]                /* configure sdram bank0 setup */
        ldr     r1, =(KS8695_IO_BASE+KS8695_SDRAM_CTRL1)
-       mov     r2, #0
+#if (CONFIG_NR_DRAM_BANKS == 2)
+#if (PHYS_SDRAM_2_SIZE == 0x02000000)
+       ldr     r2, =0xFFE0000E         /* 32MB and start at 32MB */
+#else
+       ldr     r2, =0x7FD0000E         /* 16MB and start at 16MB */
+#endif
+#else  /* CONFIG_NR_DRAM_BANKS == 2 */
+       mov     r2, #0                  /* no second SDRAM bank */
+#endif /* CONFIG_NR_DRAM_BANKS == 2 */
        str     r2, [r1]                /* configure sdram bank1 setup */

        ldr     r1, =(KS8695_IO_BASE+KS8695_SDRAM_GENERAL)

--

_________________________________________________
Michael Bernstein
NOC

Controlware GmbH
Waldstrasse 92, 63128 Dietzenbach, GERMANY
Tel.: +49 6074 858-177
Fax: +49 6074 858-148
Michael.Bernstein at controlware.de
www.controlware.de
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