[U-Boot] [PATCH] mpc83xx: Make it boot again
Andre Schwarz
andre.schwarz at matrix-vision.de
Fri Nov 5 09:24:12 CET 2010
On 11/04/2010 08:49 PM, Wood Scott-B07421 wrote:
>
> Timur Tabi wrote:
> > Wood Scott-B07421 wrote:
> > > To be totally safe, we probably want to do a readback plus twi (to
> turn
> > > a data dependency into a flow dependency) before the isync.
> >
> > twi == trap word immediate?
>
> Yes.
>
> > If so, I don't see how that will turn a data dependency into a flow
> dependency.
> > Is that some sort of side effect of twi?
>
> It decides based on the input register (data dependency) whether to
> cause a trap (flow dependency). We never want it to actually trap, so
> we set a condition that says never trap, but the dependency is still
> there -- the hardware doesn't decode it as a no-op.
>
Might there be any other location this could be used for ?
Actually my 8377 is running fine up to 533MHz core and csb up to 400MHz.
As soon as core frequency rises to 600MHz+ there'll be frequent hangs
during flush_dcache.
core voltage is clean at 1.05V without any glitches or significant load
steps.
Can anybody confirm that current code runs stable on MPC837x at 600MHz+ ?
Regards,
André
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