[U-Boot] [PATCH] mpc83xx: Make it boot again

[Liu Dave-R63238]

> Wouldn't the fact that you're accessing the same address -- and
> that it's cache inhibited -- eliminate the need for a sync instruction
> between the stw and lwz?

You are right. If st and ld the same address, e300 core have a address
collision inside.
It will make sure the order. Here we don't need the sync.

I meant we should access the IMMR register with something like I/O
accessors
to have a correct access order.

Thanks,
 Dave