[U-Boot] [PATCH v5] nds32: Add NDS32 architecture support (header files)
Macpaul Lin
macpaul at andestech.com
Fri Nov 19 06:51:43 CET 2010
This patch add generic header files support for nds32 architecture.
Cache, ptregs, data type and other definitions are included.
NDS32 is a new 32-bit RISC architecture invented by andestech.com.
NDS32 also provide N9, N10, N12 different CPU core families for soft-core
and hard-core SoC design.
Note:
Empty headers such as config.h, memory.h, processor.h are necessary for
compiling some device drivers.
Otherwise those drivers won't be build.
Signed-off-by: Macpaul Lin <macpaul at andestech.com>
---
Changes for v1:
- First commit of nds32 arch to u-boot, add SoC ag101, adp-ag101 into u-boot.
Changes for v2:
- Clean up coding style.
- Reorganize code of SoC ag101 from a320.
Changes for v3:
- Clean up coding style.
- Reordering and reduce the size and patches.
Changes for v4:
- Clear up for Patch v3.
- Remove code that haven't used in the system.
- Commit header files only for easier code review.
Changes for v5:
- Update changes against the change after master tree (v2010.12-rc1).
- Fix upper case definitions in cache.h.
- Support GD_FLG_ENV_READY and env_buf vars in nds32 global_data.h.
- Add readsb, writesb functions into io.h.
arch/nds32/include/asm/bitops.h | 150 ++++++++++++
arch/nds32/include/asm/byteorder.h | 36 +++
arch/nds32/include/asm/cache.h | 51 ++++
arch/nds32/include/asm/config.h | 26 ++
arch/nds32/include/asm/global_data.h | 82 +++++++
arch/nds32/include/asm/io.h | 408 +++++++++++++++++++++++++++++++++
arch/nds32/include/asm/mach-types.h | 29 +++
arch/nds32/include/asm/memory.h | 19 ++
arch/nds32/include/asm/posix_types.h | 84 +++++++
arch/nds32/include/asm/processor.h | 25 ++
arch/nds32/include/asm/ptrace.h | 22 ++
arch/nds32/include/asm/ptregs.h | 82 +++++++
arch/nds32/include/asm/string.h | 57 +++++
arch/nds32/include/asm/types.h | 67 ++++++
arch/nds32/include/asm/u-boot-nds32.h | 47 ++++
arch/nds32/include/asm/u-boot.h | 69 ++++++
arch/nds32/include/asm/unaligned.h | 31 +++
17 files changed, 1285 insertions(+), 0 deletions(-)
create mode 100644 arch/nds32/include/asm/bitops.h
create mode 100644 arch/nds32/include/asm/byteorder.h
create mode 100644 arch/nds32/include/asm/cache.h
create mode 100644 arch/nds32/include/asm/config.h
create mode 100644 arch/nds32/include/asm/global_data.h
create mode 100644 arch/nds32/include/asm/io.h
create mode 100644 arch/nds32/include/asm/mach-types.h
create mode 100644 arch/nds32/include/asm/memory.h
create mode 100644 arch/nds32/include/asm/posix_types.h
create mode 100644 arch/nds32/include/asm/processor.h
create mode 100644 arch/nds32/include/asm/ptrace.h
create mode 100644 arch/nds32/include/asm/ptregs.h
create mode 100644 arch/nds32/include/asm/string.h
create mode 100644 arch/nds32/include/asm/types.h
create mode 100644 arch/nds32/include/asm/u-boot-nds32.h
create mode 100644 arch/nds32/include/asm/u-boot.h
create mode 100644 arch/nds32/include/asm/unaligned.h
diff --git a/arch/nds32/include/asm/bitops.h b/arch/nds32/include/asm/bitops.h
new file mode 100644
index 0000000..f658a03
--- /dev/null
+++ b/arch/nds32/include/asm/bitops.h
@@ -0,0 +1,150 @@
+/*
+ * Copyright 1995, Russell King.
+ * Various bits and pieces copyrights include:
+ * Linus Torvalds (test_bit).
+ *
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation <nobuhiro at andestech.com>
+ *
+ * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
+ *
+ * Please note that the code in this file should never be included
+ * from user space. Many of these are not implemented in assembler
+ * since they would be too costly. Also, they require priviledged
+ * instructions (which are not available from user mode) to ensure
+ * that they are atomic.
+ */
+
+#ifndef __ASM_NDS_BITOPS_H
+#define __ASM_NDS_BITOPS_H
+
+#ifdef __KERNEL__
+
+#define smp_mb__before_clear_bit() do { } while (0)
+#define smp_mb__after_clear_bit() do { } while (0)
+
+/*
+ * Function prototypes to keep gcc -Wall happy.
+ */
+extern void set_bit(int nr, volatile void * addr);
+
+static inline void __set_bit(int nr, volatile void *addr)
+{
+ ((unsigned char *) addr)[nr >> 3] |= (1U << (nr & 7));
+}
+
+extern void clear_bit(int nr, volatile void * addr);
+
+static inline void __clear_bit(int nr, volatile void *addr)
+{
+ ((unsigned char *) addr)[nr >> 3] &= ~(1U << (nr & 7));
+}
+
+extern void change_bit(int nr, volatile void * addr);
+
+static inline void __change_bit(int nr, volatile void *addr)
+{
+ ((unsigned char *) addr)[nr >> 3] ^= (1U << (nr & 7));
+}
+
+extern int test_and_set_bit(int nr, volatile void * addr);
+
+static inline int __test_and_set_bit(int nr, volatile void *addr)
+{
+ unsigned int mask = 1 << (nr & 7);
+ unsigned int oldval;
+
+ oldval = ((unsigned char *) addr)[nr >> 3];
+ ((unsigned char *) addr)[nr >> 3] = oldval | mask;
+ return oldval & mask;
+}
+
+extern int test_and_clear_bit(int nr, volatile void * addr);
+
+static inline int __test_and_clear_bit(int nr, volatile void *addr)
+{
+ unsigned int mask = 1 << (nr & 7);
+ unsigned int oldval;
+
+ oldval = ((unsigned char *) addr)[nr >> 3];
+ ((unsigned char *) addr)[nr >> 3] = oldval & ~mask;
+ return oldval & mask;
+}
+
+extern int test_and_change_bit(int nr, volatile void * addr);
+
+static inline int __test_and_change_bit(int nr, volatile void *addr)
+{
+ unsigned int mask = 1 << (nr & 7);
+ unsigned int oldval;
+
+ oldval = ((unsigned char *) addr)[nr >> 3];
+ ((unsigned char *) addr)[nr >> 3] = oldval ^ mask;
+ return oldval & mask;
+}
+
+extern int find_first_zero_bit(void * addr, unsigned size);
+extern int find_next_zero_bit(void * addr, int size, int offset);
+
+/*
+ * This routine doesn't need to be atomic.
+ */
+static inline int test_bit(int nr, const void * addr)
+{
+ return ((unsigned char *) addr)[nr >> 3] & (1U << (nr & 7));
+}
+
+/*
+ * ffz = Find First Zero in word. Undefined if no zero exists,
+ * so code should check against ~0UL first..
+ */
+static inline unsigned long ffz(unsigned long word)
+{
+ int k;
+
+ word = ~word;
+ k = 31;
+ if (word & 0x0000ffff) { k -= 16; word <<= 16; }
+ if (word & 0x00ff0000) { k -= 8; word <<= 8; }
+ if (word & 0x0f000000) { k -= 4; word <<= 4; }
+ if (word & 0x30000000) { k -= 2; word <<= 2; }
+ if (word & 0x40000000) { k -= 1; }
+ return k;
+}
+
+/*
+ * ffs: find first bit set. This is defined the same way as
+ * the libc and compiler builtin ffs routines, therefore
+ * differs in spirit from the above ffz (man ffs).
+ */
+
+/*
+ * redefined in include/linux/bitops.h
+ * #define ffs(x) generic_ffs(x)
+ */
+
+/*
+ * hweightN: returns the hamming weight (i.e. the number
+ * of bits set) of a N-bit word
+ */
+
+#define hweight32(x) generic_hweight32(x)
+#define hweight16(x) generic_hweight16(x)
+#define hweight8(x) generic_hweight8(x)
+
+#define ext2_set_bit test_and_set_bit
+#define ext2_clear_bit test_and_clear_bit
+#define ext2_test_bit test_bit
+#define ext2_find_first_zero_bit find_first_zero_bit
+#define ext2_find_next_zero_bit find_next_zero_bit
+
+/* Bitmap functions for the minix filesystem. */
+#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
+#define minix_set_bit(nr,addr) set_bit(nr,addr)
+#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
+#define minix_test_bit(nr,addr) test_bit(nr,addr)
+#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
+
+#endif /* __KERNEL__ */
+
+#endif /* __ASM_NDS_BITOPS_H */
diff --git a/arch/nds32/include/asm/byteorder.h b/arch/nds32/include/asm/byteorder.h
new file mode 100644
index 0000000..0b48be4
--- /dev/null
+++ b/arch/nds32/include/asm/byteorder.h
@@ -0,0 +1,36 @@
+/*
+ * linux/include/asm-arm/byteorder.h
+ *
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation <nobuhiro at andestech.com>
+ * Macpaul Lin, Andes Technology Corporation <macpaul at andestech.com>
+ *
+ * ARM Endian-ness. In little endian mode, the data bus is connected such
+ * that byte accesses appear as:
+ * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
+ * and word accesses (data or instruction) appear as:
+ * d0...d31
+ *
+ * When in big endian mode, byte accesses appear as:
+ * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
+ * and word accesses (data or instruction) appear as:
+ * d0...d31
+ */
+
+#ifndef __ASM_NDS_BYTEORDER_H
+#define __ASM_NDS_BYTEORDER_H
+
+#include <asm/types.h>
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+# define __BYTEORDER_HAS_U64__
+# define __SWAB_64_THRU_32__
+#endif
+
+#ifdef __NDSEB__
+#include <linux/byteorder/big_endian.h>
+#else
+#include <linux/byteorder/little_endian.h>
+#endif
+
+#endif
diff --git a/arch/nds32/include/asm/cache.h b/arch/nds32/include/asm/cache.h
new file mode 100644
index 0000000..25f8575
--- /dev/null
+++ b/arch/nds32/include/asm/cache.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation <nobuhiro at andestech.com>
+ * Macpaul Lin, Andes Technology Corporation <macpaul at andestech.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ASM_CACHE_H
+#define _ASM_CACHE_H
+
+/* cache */
+int icache_status (void);
+void icache_enable (void);
+void icache_disable(void);
+int dcache_status (void);
+void dcache_enable (void);
+void dcache_disable(void);
+
+#define DEFINE_GET_SYS_REG(reg) \
+ inline static unsigned long GET_##reg(void) { \
+ unsigned long val; \
+ __asm__ volatile ( "mfsr %0, $"#reg :"=&r" (val) ::"memory"); \
+ return val; \
+ }
+
+enum cache_t{ ICACHE, DCACHE};
+DEFINE_GET_SYS_REG( ICM_CFG);
+DEFINE_GET_SYS_REG( DCM_CFG);
+#define ICM_CFG_OFF_ISZ 6 /* I-cache line size */
+#define ICM_CFG_MSK_ISZ ( 0x7UL << ICM_CFG_OFF_ISZ )
+#define DCM_CFG_OFF_DSZ 6 /* D-cache line size */
+#define DCM_CFG_MSK_DSZ ( 0x7UL << DCM_CFG_OFF_DSZ )
+
+#endif /* _ASM_CACHE_H */
diff --git a/arch/nds32/include/asm/config.h b/arch/nds32/include/asm/config.h
new file mode 100644
index 0000000..213d18f
--- /dev/null
+++ b/arch/nds32/include/asm/config.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Copyright (C) 2010 Shawn Lin (nobuhiro at andestech.com)
+ * Copyright (C) 2010 Macpaul Lin (macpaul at andestech.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef _ASM_CONFIG_H_
+#define _ASM_CONFIG_H_
+
+#endif
diff --git a/arch/nds32/include/asm/global_data.h b/arch/nds32/include/asm/global_data.h
new file mode 100644
index 0000000..a605756
--- /dev/null
+++ b/arch/nds32/include/asm/global_data.h
@@ -0,0 +1,82 @@
+/*
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation <nobuhiro at andestech.com>
+ * Macpaul Lin, Andes Technology Corporation <macpaul at andestech.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/**************************************************************
+ * CAUTION:
+ * - do not implement for NDS32 Arch yet.
+ * - so far no one uses the macros defined in this head file.
+ **************************************************************/
+
+#ifndef __ASM_GBL_DATA_H
+#define __ASM_GBL_DATA_H
+/*
+ * The following data structure is placed in some memory wich is
+ * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
+ * some locked parts of the data cache) to allow for a minimum set of
+ * global variables during system initialization (until we have set
+ * up the memory controller so that we can use RAM).
+ *
+ * Keep it *SMALL* and remember to set CONFIG_GBL_DATA_SIZE > sizeof(gd_t)
+ */
+
+typedef struct global_data {
+ bd_t *bd;
+ unsigned long flags;
+ unsigned long baudrate;
+ unsigned long have_console; /* serial_init() was called */
+
+ unsigned long reloc_off; /* Relocation Offset */
+ unsigned long env_addr; /* Address of Environment struct */
+ unsigned long env_valid; /* Checksum of Environment valid? */
+ unsigned long fb_base; /* base address of frame buffer */
+#ifdef CONFIG_VFD
+ unsigned char vfd_type; /* display type */
+#endif
+ void **jt; /* jump table */
+ char env_buf[32]; /* buffer for getenv() before reloc. */
+} gd_t;
+
+/*
+ * Global Data Flags
+ */
+#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
+#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
+#define GD_FLG_SILENT 0x00004 /* Silent mode */
+#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
+#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
+#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
+#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
+#define GD_FLG_ENV_READY 0x00080 /* Environment imported into hash table */
+
+#ifdef CONFIG_GLOBAL_DATA_NOT_REG8
+extern volatile gd_t g_gd;
+#define DECLARE_GLOBAL_DATA_PTR static volatile gd_t *gd = &g_gd
+#else
+#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("$r8")
+#endif
+
+#endif /* __ASM_GBL_DATA_H */
diff --git a/arch/nds32/include/asm/io.h b/arch/nds32/include/asm/io.h
new file mode 100644
index 0000000..e43e8f1
--- /dev/null
+++ b/arch/nds32/include/asm/io.h
@@ -0,0 +1,408 @@
+/*
+ * linux/include/asm-nds/io.h
+ *
+ * Copyright (C) 1996-2000 Russell King
+ *
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation <nobuhiro at andestech.com>
+ * Macpaul Lin, Andes Technology Corporation <macpaul at andestech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Modifications:
+ * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
+ * constant addresses and variable addresses.
+ * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
+ * specific IO header files.
+ * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
+ * 04-Apr-1999 PJB Added check_signature.
+ * 12-Dec-1999 RMK More cleanups
+ * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
+ */
+#ifndef __ASM_NDS_IO_H
+#define __ASM_NDS_IO_H
+
+/**************************************************************
+ * CAUTION:
+ * - do not implement for NDS32 Arch yet.
+ * - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc... include asm/io.h
+ **************************************************************/
+
+#ifdef __KERNEL__
+
+#include <linux/types.h>
+#include <asm/byteorder.h>
+#include <asm/memory.h>
+
+static inline void sync(void)
+{
+}
+
+/*
+ * Given a physical address and a length, return a virtual address
+ * that can be used to access the memory range with the caching
+ * properties specified by "flags".
+ */
+#define MAP_NOCACHE (0)
+#define MAP_WRCOMBINE (0)
+#define MAP_WRBACK (0)
+#define MAP_WRTHROUGH (0)
+
+static inline void *
+map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
+{
+ return (void *)paddr;
+}
+
+/*
+ * Take down a mapping set up by map_physmem().
+ */
+static inline void unmap_physmem(void *vaddr, unsigned long flags)
+{
+
+}
+
+static inline phys_addr_t virt_to_phys(void * vaddr)
+{
+ return (phys_addr_t)(vaddr);
+}
+
+/*
+ * Generic virtual read/write. Note that we don't support half-word
+ * read/writes. We define __arch_*[bl] here, and leave __arch_*w
+ * to the architecture specific code.
+ */
+#define __arch_getb(a) (*(volatile unsigned char *)(a))
+#define __arch_getw(a) (*(volatile unsigned short *)(a))
+#define __arch_getl(a) (*(volatile unsigned int *)(a))
+
+#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
+#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
+#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
+
+extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
+extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
+extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
+
+extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
+extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
+extern void __raw_readsl(unsigned int addr, void *data, int longlen);
+
+#define __raw_writeb(v,a) __arch_putb(v,a)
+#define __raw_writew(v,a) __arch_putw(v,a)
+#define __raw_writel(v,a) __arch_putl(v,a)
+
+#define __raw_readb(a) __arch_getb(a)
+#define __raw_readw(a) __arch_getw(a)
+#define __raw_readl(a) __arch_getl(a)
+
+#define writeb(v,a) __arch_putb(v,a)
+#define writew(v,a) __arch_putw(v,a)
+#define writel(v,a) __arch_putl(v,a)
+
+#define readb(a) __arch_getb(a)
+#define readw(a) __arch_getw(a)
+#define readl(a) __arch_getl(a)
+
+/*
+ * The compiler seems to be incapable of optimising constants
+ * properly. Spell it out to the compiler in some cases.
+ * These are only valid for small values of "off" (< 1<<12)
+ */
+#define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off)
+#define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off)
+#define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off)
+
+#define __raw_base_readb(base,off) __arch_base_getb(base,off)
+#define __raw_base_readw(base,off) __arch_base_getw(base,off)
+#define __raw_base_readl(base,off) __arch_base_getl(base,off)
+
+/*
+ * Now, pick up the machine-defined IO definitions
+ * #include <asm/arch/io.h>
+ */
+
+/*
+ * IO port access primitives
+ * -------------------------
+ *
+ * The ARM doesn't have special IO access instructions; all IO is memory
+ * mapped. Note that these are defined to perform little endian accesses
+ * only. Their primary purpose is to access PCI and ISA peripherals.
+ *
+ * Note that for a big endian machine, this implies that the following
+ * big endian mode connectivity is in place, as described by numerious
+ * ARM documents:
+ *
+ * PCI: D0-D7 D8-D15 D16-D23 D24-D31
+ * ARM: D24-D31 D16-D23 D8-D15 D0-D7
+ *
+ * The machine specific io.h include defines __io to translate an "IO"
+ * address to a memory address.
+ *
+ * Note that we prevent GCC re-ordering or caching values in expressions
+ * by introducing sequence points into the in*() definitions. Note that
+ * __raw_* do not guarantee this behaviour.
+ *
+ * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
+ */
+#ifdef __io
+#define outb(v,p) __raw_writeb(v,__io(p))
+#define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p))
+#define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p))
+
+#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
+#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
+#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
+
+#define outsb(p,d,l) writesb(__io(p),d,l)
+#define outsw(p,d,l) writesw(__io(p),d,l)
+#define outsl(p,d,l) writesl(__io(p),d,l)
+
+#define insb(p,d,l) readsb(__io(p),d,l)
+#define insw(p,d,l) readsw(__io(p),d,l)
+#define insl(p,d,l) readsl(__io(p),d,l)
+
+static inline void readsb(unsigned int *addr, void * data, int bytelen)
+{
+ unsigned char *ptr = (unsigned char *)addr;
+ unsigned char *ptr2 = (unsigned char *)data;
+ while(bytelen) {
+ *ptr2 = *ptr;
+ ptr2++;
+ bytelen--;
+ }
+}
+
+static inline void readsw(unsigned int *addr, void * data, int wordlen)
+{
+ unsigned short *ptr = (unsigned short *)addr;
+ unsigned short *ptr2 = (unsigned short *)data;
+ while(wordlen) {
+ *ptr2 = *ptr;
+ ptr2++;
+ wordlen--;
+ }
+}
+
+static inline void readsl(unsigned int *addr, void * data, int longlen)
+{
+ unsigned int *ptr = (unsigned int *)addr;
+ unsigned int *ptr2 = (unsigned int *)data;
+ while(longlen) {
+ *ptr2 = *ptr;
+ ptr2++;
+ longlen--;
+ }
+}
+static inline void writesb(unsigned int *addr, const void * data, int bytelen)
+{
+ unsigned char *ptr = (unsigned char *)addr;
+ unsigned char *ptr2 = (unsigned char *)data;
+ while(bytelen) {
+ *ptr = *ptr2;
+ ptr2++;
+ bytelen--;
+ }
+}
+static inline void writesw(unsigned int *addr, const void * data, int wordlen)
+{
+ unsigned short *ptr = (unsigned short *)addr;
+ unsigned short *ptr2 = (unsigned short *)data;
+ while(wordlen) {
+ *ptr = *ptr2;
+ ptr2++;
+ wordlen--;
+ }
+}
+static inline void writesl(unsigned int *addr, const void * data, int longlen)
+{
+ unsigned int *ptr = (unsigned int *)addr;
+ unsigned int *ptr2 = (unsigned int *)data;
+ while(longlen) {
+ *ptr = *ptr2;
+ ptr2++;
+ longlen--;
+ }
+}
+#endif
+
+#define outb_p(val,port) outb((val),(port))
+#define outw_p(val,port) outw((val),(port))
+#define outl_p(val,port) outl((val),(port))
+#define inb_p(port) inb((port))
+#define inw_p(port) inw((port))
+#define inl_p(port) inl((port))
+
+#define outsb_p(port,from,len) outsb(port,from,len)
+#define outsw_p(port,from,len) outsw(port,from,len)
+#define outsl_p(port,from,len) outsl(port,from,len)
+#define insb_p(port,to,len) insb(port,to,len)
+#define insw_p(port,to,len) insw(port,to,len)
+#define insl_p(port,to,len) insl(port,to,len)
+
+/*
+ * ioremap and friends.
+ *
+ * ioremap takes a PCI memory address, as specified in
+ * linux/Documentation/IO-mapping.txt. If you want a
+ * physical address, use __ioremap instead.
+ */
+extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags);
+extern void __iounmap(void *addr);
+
+/*
+ * Generic ioremap support.
+ *
+ * Define:
+ * iomem_valid_addr(off,size)
+ * iomem_to_phys(off)
+ */
+#ifdef iomem_valid_addr
+#define __arch_ioremap(off,sz,nocache) \
+ ({ \
+ unsigned long _off = (off), _size = (sz); \
+ void *_ret = (void *)0; \
+ if (iomem_valid_addr(_off, _size)) \
+ _ret = __ioremap(iomem_to_phys(_off),_size,0); \
+ _ret; \
+ })
+
+#define __arch_iounmap __iounmap
+#endif
+
+#define ioremap(off,sz) __arch_ioremap((off),(sz),0)
+#define ioremap_nocache(off,sz) __arch_ioremap((off),(sz),1)
+#define iounmap(_addr) __arch_iounmap(_addr)
+
+/*
+ * DMA-consistent mapping functions. These allocate/free a region of
+ * uncached, unwrite-buffered mapped memory space for use with DMA
+ * devices. This is the "generic" version. The PCI specific version
+ * is in pci.h
+ */
+extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
+extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
+extern void consistent_sync(void *vaddr, size_t size, int rw);
+
+/*
+ * String version of IO memory access ops:
+ */
+extern void _memcpy_fromio(void *, unsigned long, size_t);
+extern void _memcpy_toio(unsigned long, const void *, size_t);
+extern void _memset_io(unsigned long, int, size_t);
+
+extern void __readwrite_bug(const char *fn);
+
+/*
+ * If this architecture has PCI memory IO, then define the read/write
+ * macros. These should only be used with the cookie passed from
+ * ioremap.
+ */
+#ifdef __mem_pci
+
+#define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
+#define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
+#define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
+
+#define writeb(v,c) __raw_writeb(v,__mem_pci(c))
+#define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c))
+#define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c))
+
+#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l))
+#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l))
+#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l))
+
+#define eth_io_copy_and_sum(s,c,l,b) \
+ eth_copy_and_sum((s),__mem_pci(c),(l),(b))
+
+static inline int
+check_signature(unsigned long io_addr, const unsigned char *signature,
+ int length)
+{
+ int retval = 0;
+ do {
+ if (readb(io_addr) != *signature)
+ goto out;
+ io_addr++;
+ signature++;
+ length--;
+ } while (length);
+ retval = 1;
+out:
+ return retval;
+}
+
+#elif !defined(readb)
+
+#define readb(addr) (__readwrite_bug("readb"),0)
+#define readw(addr) (__readwrite_bug("readw"),0)
+#define readl(addr) (__readwrite_bug("readl"),0)
+#define writeb(v,addr) __readwrite_bug("writeb")
+#define writew(v,addr) __readwrite_bug("writew")
+#define writel(v,addr) __readwrite_bug("writel")
+
+#define eth_io_copy_and_sum(a,b,c,d) __readwrite_bug("eth_io_copy_and_sum")
+
+#define check_signature(io,sig,len) (0)
+
+#endif /* __mem_pci */
+
+/*
+ * If this architecture has ISA IO, then define the isa_read/isa_write
+ * macros.
+ */
+#ifdef __mem_isa
+
+#define isa_readb(addr) __raw_readb(__mem_isa(addr))
+#define isa_readw(addr) __raw_readw(__mem_isa(addr))
+#define isa_readl(addr) __raw_readl(__mem_isa(addr))
+#define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr))
+#define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr))
+#define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr))
+#define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c))
+#define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c))
+#define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c))
+
+#define isa_eth_io_copy_and_sum(a,b,c,d) \
+ eth_copy_and_sum((a),__mem_isa(b),(c),(d))
+
+static inline int
+isa_check_signature(unsigned long io_addr, const unsigned char *signature,
+ int length)
+{
+ int retval = 0;
+ do {
+ if (isa_readb(io_addr) != *signature)
+ goto out;
+ io_addr++;
+ signature++;
+ length--;
+ } while (length);
+ retval = 1;
+out:
+ return retval;
+}
+
+#else /* __mem_isa */
+
+#define isa_readb(addr) (__readwrite_bug("isa_readb"),0)
+#define isa_readw(addr) (__readwrite_bug("isa_readw"),0)
+#define isa_readl(addr) (__readwrite_bug("isa_readl"),0)
+#define isa_writeb(val,addr) __readwrite_bug("isa_writeb")
+#define isa_writew(val,addr) __readwrite_bug("isa_writew")
+#define isa_writel(val,addr) __readwrite_bug("isa_writel")
+#define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io")
+#define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio")
+#define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio")
+
+#define isa_eth_io_copy_and_sum(a,b,c,d) \
+ __readwrite_bug("isa_eth_io_copy_and_sum")
+
+#define isa_check_signature(io,sig,len) (0)
+
+#endif /* __mem_isa */
+#endif /* __KERNEL__ */
+#endif /* __ASM_NDS_IO_H */
diff --git a/arch/nds32/include/asm/mach-types.h b/arch/nds32/include/asm/mach-types.h
new file mode 100644
index 0000000..a6f1c93
--- /dev/null
+++ b/arch/nds32/include/asm/mach-types.h
@@ -0,0 +1,29 @@
+/*
+ * This was automagically generated from arch/nds/tools/mach-types!
+ * Do NOT edit
+ */
+
+#ifndef __ASM_NDS32_MACH_TYPE_H
+#define __ASM_NDS32_MACH_TYPE_H
+
+#ifndef __ASSEMBLY__
+/* The type of machine we're running on */
+extern unsigned int __machine_arch_type;
+#endif
+
+/* see arch/arm/kernel/arch.c for a description of these */
+#define MACH_TYPE_ADPAG101 0
+
+#ifdef CONFIG_ARCH_ADPAG101
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_ADPAG101
+# endif
+# define machine_is_adpag101() (machine_arch_type == MACH_TYPE_ADPAG101)
+#else
+# define machine_is_adpag101() (0)
+#endif
+
+#endif /* __ASM_NDS32_MACH_TYPE_H */
diff --git a/arch/nds32/include/asm/memory.h b/arch/nds32/include/asm/memory.h
new file mode 100644
index 0000000..b8cff9b
--- /dev/null
+++ b/arch/nds32/include/asm/memory.h
@@ -0,0 +1,19 @@
+/*
+ * linux/include/asm-arm/memory.h
+ *
+ * Copyright (C) 2000-2002 Russell King
+ *
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Copyright (C) 2010 Shawn Lin (nobuhiro at andestech.com)
+ * Copyright (C) 2010 Macpaul Lin (macpaul at andestech.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Note: this file should not be included by non-asm/.h files
+ */
+#ifndef __ASM_NDS_MEMORY_H
+#define __ASM_NDS_MEMORY_H
+
+#endif /* __ASM_NDS_MEMORY_H */
diff --git a/arch/nds32/include/asm/posix_types.h b/arch/nds32/include/asm/posix_types.h
new file mode 100644
index 0000000..246167d
--- /dev/null
+++ b/arch/nds32/include/asm/posix_types.h
@@ -0,0 +1,84 @@
+/*
+ * linux/include/asm-arm/posix_types.h
+ *
+ * Copyright (C) 1996-1998 Russell King.
+ *
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Copyright (C) 2010 Shawn Lin (nobuhiro at andestech.com)
+ * Copyright (C) 2010 Macpaul Lin (macpaul at andestech.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Changelog:
+ * 27-06-1996 RMK Created
+ * 05-03-2010 Modified for arch NDS32
+ */
+#ifndef __ARCH_NDS_POSIX_TYPES_H
+#define __ARCH_NDS_POSIX_TYPES_H
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc. Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned short __kernel_dev_t;
+typedef unsigned long __kernel_ino_t;
+typedef unsigned short __kernel_mode_t;
+typedef unsigned short __kernel_nlink_t;
+typedef long __kernel_off_t;
+typedef int __kernel_pid_t;
+typedef unsigned short __kernel_ipc_pid_t;
+typedef unsigned short __kernel_uid_t;
+typedef unsigned short __kernel_gid_t;
+typedef unsigned int __kernel_size_t;
+typedef int __kernel_ssize_t;
+typedef int __kernel_ptrdiff_t;
+typedef long __kernel_time_t;
+typedef long __kernel_suseconds_t;
+typedef long __kernel_clock_t;
+typedef int __kernel_daddr_t;
+typedef char * __kernel_caddr_t;
+typedef unsigned short __kernel_uid16_t;
+typedef unsigned short __kernel_gid16_t;
+typedef unsigned int __kernel_uid32_t;
+typedef unsigned int __kernel_gid32_t;
+
+typedef unsigned short __kernel_old_uid_t;
+typedef unsigned short __kernel_old_gid_t;
+
+#ifdef __GNUC__
+typedef long long __kernel_loff_t;
+#endif
+
+typedef struct {
+#if defined(__KERNEL__) || defined(__USE_ALL)
+ int val[2];
+#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+ int __val[2];
+#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
+
+#undef __FD_SET
+#define __FD_SET(fd, fdsetp) \
+ (((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1<<(fd & 31)))
+
+#undef __FD_CLR
+#define __FD_CLR(fd, fdsetp) \
+ (((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1<<(fd & 31)))
+
+#undef __FD_ISSET
+#define __FD_ISSET(fd, fdsetp) \
+ ((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1<<(fd & 31))) != 0)
+
+#undef __FD_ZERO
+#define __FD_ZERO(fdsetp) \
+ (memset (fdsetp, 0, sizeof (*(fd_set *)fdsetp)))
+
+#endif
+
+#endif /* __ARCH_NDS_POSIX_TYPES_H */
diff --git a/arch/nds32/include/asm/processor.h b/arch/nds32/include/asm/processor.h
new file mode 100644
index 0000000..19fdcc0
--- /dev/null
+++ b/arch/nds32/include/asm/processor.h
@@ -0,0 +1,25 @@
+/*
+ * linux/include/asm-arm/processor.h
+ *
+ * Copyright (C) 1995-2002 Russell King
+ *
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Copyright (C) 2010 Shawn Lin (nobuhiro at andestech.com)
+ * Copyright (C) 2010 Macpaul Lin (macpaul at andestech.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_NDS_PROCESSOR_H
+#define __ASM_NDS_PROCESSOR_H
+
+/**************************************************************
+ * CAUTION:
+ * - do not implement for NDS32 Arch yet.
+ * - so far some files include /asm/processor.h, but
+ * no one uses the macros defined in this head file.
+ **************************************************************/
+
+#endif /* __ASM_ARM_PROCESSOR_H */
diff --git a/arch/nds32/include/asm/ptrace.h b/arch/nds32/include/asm/ptrace.h
new file mode 100644
index 0000000..fb804cb
--- /dev/null
+++ b/arch/nds32/include/asm/ptrace.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Copyright (C) 2010 Shawn Lin (nobuhiro at andestech.com)
+ * Copyright (C) 2010 Macpaul Lin (macpaul at andestech.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * CAUTION:
+ * - do not implement for NDS32 Arch yet.
+ * - included in common.h
+ */
+
+#ifndef __ASM_NDS_PTRACE_H
+#define __ASM_NDS_PTRACE_H
+
+#include <asm/ptregs.h>
+
+#endif /* __ASM_NDS_PTRACE_H */
diff --git a/arch/nds32/include/asm/ptregs.h b/arch/nds32/include/asm/ptregs.h
new file mode 100644
index 0000000..0d34b04
--- /dev/null
+++ b/arch/nds32/include/asm/ptregs.h
@@ -0,0 +1,82 @@
+/*
+ * linux/include/asm-arm/proc-armv/ptrace.h
+ *
+ * Copyright (C) 1996-1999 Russell King
+ *
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Copyright (C) 2010 Shawn Lin (nobuhiro at andestech.com)
+ * Copyright (C) 2010 Macpaul Lin (macpaul at andestech.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __PTREGS_H
+#define __PTREGS_H
+
+#define USR_MODE 0x00
+#define SU_MODE 0x01
+#define HV_MODE 0x10
+#define MODE_MASK (0x03<<3)
+#define GIE_BIT 0x01
+
+#ifndef __ASSEMBLY__
+
+/* this struct defines the way the registers are stored on the
+ stack during a system call. */
+
+struct pt_regs {
+ long uregs[39];
+};
+
+#define PTREGS(reg) [reg]
+#define R0 uregs[1] /* R0 */
+#define R1 uregs[2]
+#define R2 uregs[3]
+#define R3 uregs[4]
+#define R4 uregs[5]
+#define R5 uregs[6]
+#define R6 uregs[7]
+#define R7 uregs[8]
+#define R8 uregs[9]
+#define R9 uregs[10]
+#define R10 uregs[11]
+#define R11 uregs[12]
+#define R12 uregs[13]
+#define R13 uregs[14]
+#define R14 uregs[15]
+#define R15 uregs[16]
+#define R16 uregs[17]
+#define R17 uregs[18]
+#define R18 uregs[19]
+#define R19 uregs[20]
+#define R20 uregs[21]
+#define R21 uregs[22]
+#define R22 uregs[23]
+#define R23 uregs[24]
+#define R24 uregs[25]
+#define R25 uregs[26]
+#define R26 uregs[27]
+#define R27 uregs[28]
+#define FP uregs[29] /* R28 */
+#define GP uregs[30] /* R29 */
+#define RA uregs[31] /* R30 */
+#define SP uregs[32] /* R31 */
+#define D0HI uregs[33]
+#define D0LO uregs[34]
+#define D1HI uregs[35]
+#define D1LO uregs[36]
+#define PSW uregs[37] /* IR0 */
+#define PC uregs[38] /* PC */
+
+
+#define processor_mode(regs) \
+ (((regs)->PSW & MODE_MASK)>>3)
+
+#define interrupts_enabled(regs) \
+ ((regs)->PSW & GIE_BIT)
+
+#endif /* __ASSEMBLY__ */
+
+#endif
diff --git a/arch/nds32/include/asm/string.h b/arch/nds32/include/asm/string.h
new file mode 100644
index 0000000..85ad363
--- /dev/null
+++ b/arch/nds32/include/asm/string.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Copyright (C) 2010 Shawn Lin (nobuhiro at andestech.com)
+ * Copyright (C) 2010 Macpaul Lin (macpaul at andestech.com)
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef __ASM_NDS_STRING_H
+#define __ASM_NDS_STRING_H
+
+/*
+ * We don't do inline string functions, since the
+ * optimised inline asm versions are not small.
+ */
+
+#undef __HAVE_ARCH_STRRCHR
+extern char * strrchr(const char * s, int c);
+
+#undef __HAVE_ARCH_STRCHR
+extern char * strchr(const char * s, int c);
+
+#undef __HAVE_ARCH_MEMCPY
+extern void * memcpy(void *, const void *, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMMOVE
+extern void * memmove(void *, const void *, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMCHR
+extern void * memchr(const void *, int, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMZERO
+#undef __HAVE_ARCH_MEMSET
+extern void * memset(void *, int, __kernel_size_t);
+
+#ifdef CONFIG_MARCO_MEMSET
+extern void __memzero(void *ptr, __kernel_size_t n);
+
+#define memset(p,v,n) \
+ ({ \
+ if ((n) != 0) { \
+ if (__builtin_constant_p((v)) && (v) == 0) \
+ __memzero((p),(n)); \
+ else \
+ memset((p),(v),(n)); \
+ } \
+ (p); \
+ })
+
+#define memzero(p,n) ({ if ((n) != 0) __memzero((p),(n)); (p); })
+#else
+extern void memzero(void *ptr, __kernel_size_t n);
+#endif
+
+#endif /* __ASM_NDS_STRING_H */
diff --git a/arch/nds32/include/asm/types.h b/arch/nds32/include/asm/types.h
new file mode 100644
index 0000000..c12b3f4
--- /dev/null
+++ b/arch/nds32/include/asm/types.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Copyright (C) 2010 Shawn Lin (nobuhiro at andestech.com)
+ * Copyright (C) 2010 Macpaul Lin (macpaul at andestech.com)
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef __ASM_NDS_TYPES_H
+#define __ASM_NDS_TYPES_H
+
+typedef unsigned short umode_t;
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+#define BITS_PER_LONG 32
+
+typedef volatile unsigned char vuchar;
+typedef volatile unsigned long vulong;
+typedef volatile unsigned short vushort;
+
+#include <stddef.h>
+
+typedef u32 dma_addr_t;
+
+typedef unsigned long phys_addr_t;
+typedef unsigned long phys_size_t;
+
+#endif /* __KERNEL__ */
+
+#endif
diff --git a/arch/nds32/include/asm/u-boot-nds32.h b/arch/nds32/include/asm/u-boot-nds32.h
new file mode 100644
index 0000000..644d33b
--- /dev/null
+++ b/arch/nds32/include/asm/u-boot-nds32.h
@@ -0,0 +1,47 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger at sysgo.de>
+ *
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation <nobuhiro at andestech.com>
+ * Macpaul Lin, Andes Technology Corporation <macpaul at andestech.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _U_BOOT_NDS32_H_
+#define _U_BOOT_NDS32_H_ 1
+
+/* for the following variables, see start.S */
+extern ulong _andesboot_start; /* code start */
+extern ulong _andesboot_end; /* code end */
+extern ulong _andesboot_real_end; /* first usable RAM address */
+
+/* board/.../... */
+int board_init(void);
+int dram_init (void);
+
+/* cpu/.../interrupt.c */
+void reset_timer_masked (void);
+
+/* cpu/.../timer.c */
+int timer_init (void);
+
+#endif /* _U_BOOT_NDS32_H_ */
diff --git a/arch/nds32/include/asm/u-boot.h b/arch/nds32/include/asm/u-boot.h
new file mode 100644
index 0000000..929d367
--- /dev/null
+++ b/arch/nds32/include/asm/u-boot.h
@@ -0,0 +1,69 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger at sysgo.de>
+ *
+ * Copyright (C) 2010 Andes Technology Corporation
+ * Copyright (C) 2010 Shawn Lin (nobuhiro at andestech.com)
+ * Copyright (C) 2010 Macpaul Lin (macpaul at andestech.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ ********************************************************************
+ * NOTE: This header file defines an interface to U-Boot. Including
+ * this (unmodified) header file in another file is considered normal
+ * use of U-Boot, and does *not* fall under the heading of "derived
+ * work".
+ ********************************************************************
+ */
+
+#ifndef _U_BOOT_H_
+#define _U_BOOT_H_ 1
+
+#include <environment.h>
+
+typedef struct bd_info {
+ int bi_baudrate; /* serial console baudrate */
+ unsigned long bi_ip_addr; /* IP Address */
+ unsigned char bi_enetaddr[6]; /* Ethernet adress */
+
+ env_t *bi_env;
+ unsigned long bi_arch_number; /* unique id for this board */
+ unsigned long bi_boot_params; /* where this board expects params */
+
+ unsigned long bi_memstart; /* start of DRAM memory */
+ unsigned long bi_memsize; /* size of DRAM memory in bytes */
+ unsigned long bi_flashstart; /* start of FLASH memory */
+ unsigned long bi_flashsize; /* size of FLASH memory */
+ unsigned long bi_flashoffset; /* reserved area for startup monitor */
+
+ struct /* RAM configuration */
+ {
+ unsigned long start;
+ unsigned long size;
+ } bi_dram[CONFIG_NR_DRAM_BANKS];
+
+ /* removed according to arm */
+ /* struct bd_info_ext bi_ext; */ /* board specific extension */
+} bd_t;
+
+#define bi_env_data bi_env->data
+#define bi_env_crc bi_env->crc
+
+#endif /* _U_BOOT_H_ */
diff --git a/arch/nds32/include/asm/unaligned.h b/arch/nds32/include/asm/unaligned.h
new file mode 100644
index 0000000..4160041
--- /dev/null
+++ b/arch/nds32/include/asm/unaligned.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2016 Andes Technology Corporation
+ * Copyright (C) 2010 Macpaul Lin (macpaul at andestech.com)
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef _ASM_NDS_UNALIGNED_H
+#define _ASM_NDS_UNALIGNED_H
+
+#include <compiler.h>
+/*
+ * Select endianness
+ */
+#ifndef __NDSEB__
+#define get_unaligned __get_unaligned_le
+#define put_unaligned __put_unaligned_le
+#else
+#define get_unaligned __get_unaligned_be
+#define put_unaligned __put_unaligned_be
+#endif /* __NDSEB__ */
+
+#include <asm/byteorder.h>
+
+#include <linux/unaligned/le_byteshift.h>
+#include <linux/unaligned/be_byteshift.h>
+#include <linux/unaligned/generic.h>
+
+#endif /* _ASM_NDS_UNALIGNED_H */
--
1.7.3.2
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