[U-Boot] [PATCHv2] mpc83xx: Make it boot again

Joakim Tjernlund joakim.tjernlund at transmode.se
Fri Nov 19 18:27:06 CET 2010


Joakim Tjernlund <Joakim.Tjernlund at transmode.se> wrote on 2010/11/19 14:15:33:
>
> After the removal of COLD/WARM start flags my mpc8321
> board didn't boot anymore.
> Trial and error suggests that map/remap_flash_by_xxx needs
> to wait after updating LBLAWAR1 to make sure the the change has
> reached the HW before continuing with the code that depends on it.
> Final fix suggested by Scott Wood.
>
> Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund at transmode.se>
> ---
>
>  v2: Final adjustmenst based on inpt from Scott Wood.

Guys, I can still crash my board when a add new code in start.S
It is remap_flash_by_law0 that is giving me a hard time.
I noticed that I could bring it down by adding a few nops after
a CS0 is written but before LAW0. I also noticed that it
always crash at a new cacheline.

By swapping LAW0 with CS0 it became much better(crash yet).
I wonder if it is correct to configure CS0 then LAW0?
It seems like one must first adjust LAW0 then CS0 to
be sure it works as intended.
What do you think?

   Jocke

>  arch/powerpc/cpu/mpc83xx/start.S |    8 ++++++++
>  1 files changed, 8 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
> index e8b1ebc..5a9b790 100644
> --- a/arch/powerpc/cpu/mpc83xx/start.S
> +++ b/arch/powerpc/cpu/mpc83xx/start.S
> @@ -1191,6 +1191,10 @@ map_flash_by_law1:
>     bne 1b
>
>     stw r4, LBLAWAR1(r3) /* LBLAWAR1 <= 8MB Flash Size */
> +   /* Wait for HW to catch up */
> +   lwz r4, LBLAWAR1(r3)
> +   twi 0,r4,0
> +   isync
>     blr
>
>     /* Though all the LBIU Local Access Windows and LBC Banks will be
> @@ -1229,5 +1233,9 @@ remap_flash_by_law0:
>     xor r4, r4, r4
>     stw r4, LBLAWBAR1(r3)
>     stw r4, LBLAWAR1(r3) /* Off LBIU LAW1 */
> +   /* Wait for HW to catch up */
> +   lwz r4, LBLAWAR1(r3)
> +   twi 0,r4,0
> +   isync
>     blr
>  #endif /* CONFIG_SYS_FLASHBOOT */
> --
> 1.7.2.2
>



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