[U-Boot] [RFC PATCH] ARM: S3C64XX: add support for mini6410
Darius Augulis
augulis.darius at gmail.com
Mon Nov 22 19:28:23 CET 2010
Hi all,
is there anybody interested in U-boot for s3c64xx?
If not, at least I would like to ask Wolfgang to review generic things
(not architecture specific).
I will send some minor issues fixed with next patch version.
Mostly they will be board specific initialisation issues.
New nand spl code is needed to have very simple pre-loader without nand ecc.
Darius.
On 11/17/2010 11:26 PM, Darius Augulis wrote:
> Add support for mini6410 from FriendlyARM
>
> Signed-off-by: Darius Augulis<augulis.darius at gmail.com>
> ---
> MAKEALL | 1
> Makefile | 4
> arch/arm/cpu/arm1176/s3c64xx/Makefile | 6 -
> board/friendly_arm/mini6410/Makefile | 59 +++++
> board/friendly_arm/mini6410/config.mk | 5
> board/friendly_arm/mini6410/lowlevel_init.S | 256 +++++++++++++++++++++++
> board/friendly_arm/mini6410/mini6410.c | 99 +++++++++
> boards.cfg | 1
> include/configs/mini6410.h | 137 ++++++++++++
> nand_spl/board/friendly_arm/mini6410/Makefile | 107 ++++++++++
> nand_spl/board/friendly_arm/mini6410/config.mk | 7 +
> nand_spl/board/friendly_arm/mini6410/u-boot.lds | 85 ++++++++
> nand_spl/nand_boot_s3c.c | 131 ++++++++++++
> 13 files changed, 896 insertions(+), 2 deletions(-)
> create mode 100644 board/friendly_arm/mini6410/Makefile
> create mode 100644 board/friendly_arm/mini6410/config.mk
> create mode 100644 board/friendly_arm/mini6410/lowlevel_init.S
> create mode 100644 board/friendly_arm/mini6410/mini6410.c
> create mode 100644 include/configs/mini6410.h
> create mode 100644 nand_spl/board/friendly_arm/mini6410/Makefile
> create mode 100644 nand_spl/board/friendly_arm/mini6410/config.mk
> create mode 100644 nand_spl/board/friendly_arm/mini6410/u-boot.lds
> create mode 100644 nand_spl/nand_boot_s3c.c
>
> diff --git a/MAKEALL b/MAKEALL
> index 767d561..556aa82 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -404,6 +404,7 @@ LIST_ARM11=" \
> imx31_litekit \
> imx31_phycore \
> imx31_phycore_eet \
> + mini6410 \
> mx31ads \
> mx31pdk \
> mx31pdk_nand \
> diff --git a/Makefile b/Makefile
> index f0c2703..4dab98d 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -1087,6 +1087,10 @@ smdk6400_config : unconfig
> @$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx
> @echo "CONFIG_NAND_U_BOOT = y">> $(obj)include/config.mk
>
> +mini6410_config : unconfig
> + @mkdir -p $(obj)include
> + @$(MKCONFIG) mini6410 arm arm1176 mini6410 friendly_arm s3c64xx
> +
> #========================================================================
> # MIPS
> #========================================================================
> diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile b/arch/arm/cpu/arm1176/s3c64xx/Makefile
> index b527939..6ce2b06 100644
> --- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
> +++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
> @@ -1,4 +1,7 @@
> #
> +# (C) Copyright 2010
> +# Darius Augulis,<augulis.darius at gmail.com>
> +#
> # (C) Copyright 2000-2003
> # Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> #
> @@ -30,8 +33,7 @@ LIB = $(obj)lib$(SOC).a
>
> SOBJS = reset.o
>
> -COBJS-$(CONFIG_S3C6400) += cpu_init.o speed.o
> -COBJS-y += timer.o
> +COBJS-y += timer.o cpu_init.o speed.o
>
> OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
>
> diff --git a/board/friendly_arm/mini6410/Makefile b/board/friendly_arm/mini6410/Makefile
> new file mode 100644
> index 0000000..a1dbc41
> --- /dev/null
> +++ b/board/friendly_arm/mini6410/Makefile
> @@ -0,0 +1,59 @@
> +#
> +# (C) Copyright 2010
> +# Darius Augulis,<augulis.darius at gmail.com>
> +#
> +# (C) Copyright 2000, 2001, 2002
> +# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
> +#
> +# (C) Copyright 2008
> +# Guennadi Liakhovetki, DENX Software Engineering,<lg at denx.de>
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or modify
> +# it under the terms of the GNU General Public License as published by
> +# the Free Software Foundation; either version 2 of the License, or
> +# (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(BOARD).a
> +
> +COBJS += mini6410.o
> +SOBJS := lowlevel_init.o
> +
> +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS))
> +SOBJS := $(addprefix $(obj),$(SOBJS))
> +
> +.PHONY: all
> +
> +all: $(LIB)
> +
> +$(LIB): $(obj).depend $(OBJS) $(SOBJS)
> + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
> +
> +clean:
> + rm -f $(SOBJS) $(OBJS)
> +
> +distclean: clean
> + rm -f $(LIB) core *.bak *~ .depend
> +
> +#########################################################################
> +# This is for $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/friendly_arm/mini6410/config.mk b/board/friendly_arm/mini6410/config.mk
> new file mode 100644
> index 0000000..5ec9fa9
> --- /dev/null
> +++ b/board/friendly_arm/mini6410/config.mk
> @@ -0,0 +1,5 @@
> +ifndef CONFIG_NAND_SPL
> +CONFIG_SYS_TEXT_BASE = 0x57E00000
> +else
> +CONFIG_SYS_TEXT_BASE = 0x0C000000
> +endif
> diff --git a/board/friendly_arm/mini6410/lowlevel_init.S b/board/friendly_arm/mini6410/lowlevel_init.S
> new file mode 100644
> index 0000000..d550ea2
> --- /dev/null
> +++ b/board/friendly_arm/mini6410/lowlevel_init.S
> @@ -0,0 +1,256 @@
> +/*
> + * MINI6410: Board initialization
> + *
> + * Copyright (C) 2010 Darius Augulis<augulis.darius at gmail.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +#include<config.h>
> +#include<version.h>
> +
> +#include<asm/arch/s3c6400.h>
> +
> +#ifdef CONFIG_SERIAL1
> +#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART0_OFFSET)
> +#elif defined(CONFIG_SERIAL2)
> +#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART1_OFFSET)
> +#else
> +#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART2_OFFSET)
> +#endif
> +
> +_TEXT_BASE:
> + .word CONFIG_SYS_TEXT_BASE
> +
> + .globl lowlevel_init
> +lowlevel_init:
> + mov r12, lr
> +
> + /* LED on only #8 */
> + ldr r0, =ELFIN_GPIO_BASE
> + ldr r1, =0x55540000
> + str r1, [r0, #GPNCON_OFFSET]
> +
> + ldr r1, =0x55555555
> + str r1, [r0, #GPNPUD_OFFSET]
> +
> + ldr r1, =0xf000
> + str r1, [r0, #GPNDAT_OFFSET]
> +
> +#ifndef CONFIG_NAND_SPL
> + ldr r0, =ELFIN_GPIO_BASE
> + ldr r1, =0x1
> + str r1, [r0, #GPECON_OFFSET]
> + ldr r1, =0x0
> + str r1, [r0, #GPEDAT_OFFSET]
> +#endif
> +
> + ldr r0, =ELFIN_GPIO_BASE
> + ldr r1, =0x2A5AAAAA
> + str r1, [r0, #GPPCON_OFFSET]
> + ldr r1, =0x0
> + str r1, [r0, #GPPDAT_OFFSET]
> +
> +
> + ldr r1, =0x55555555
> + str r1, [r0, #MEM1DRVCON_OFFSET]
> +
> + /* Disable Watchdog */
> + ldr r0, =0x7e000000 @0x7e004000
> + orr r0, r0, #0x4000
> + mov r1, #0
> + str r1, [r0]
> +
> + /* External interrupt pending clear */
> + ldr r0, =(ELFIN_GPIO_BASE+EINTPEND_OFFSET) /*EINTPEND*/
> + ldr r1, [r0]
> + str r1, [r0]
> +
> + ldr r0, =ELFIN_VIC0_BASE_ADDR @0x71200000
> + ldr r1, =ELFIN_VIC1_BASE_ADDR @0x71300000
> +
> + /* Disable all interrupts (VIC0 and VIC1) */
> + mvn r3, #0x0
> + str r3, [r0, #oINTMSK]
> + str r3, [r1, #oINTMSK]
> +
> + /* Set all interrupts as IRQ */
> + mov r3, #0x0
> + str r3, [r0, #oINTMOD]
> + str r3, [r1, #oINTMOD]
> +
> + /* Pending Interrupt Clear */
> + mov r3, #0x0
> + str r3, [r0, #oVECTADDR]
> + str r3, [r1, #oVECTADDR]
> +
> + /* init system clock */
> + bl system_clock_init
> +
> +#ifndef CONFIG_NAND_SPL
> + /* for UART */
> + bl uart_asm_init
> +#endif
> +
> +#ifdef CONFIG_BOOT_NAND
> + /* simple init for NAND */
> + bl nand_asm_init
> +#endif
> +
> + /* Memory subsystem address 0x7e00f120 */
> + ldr r0, =ELFIN_MEM_SYS_CFG
> +
> + /* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
> + mov r1, #S3C64XX_MEM_SYS_CFG_NAND
> + str r1, [r0]
> +
> + bl mem_ctrl_asm_init
> +
> +1:
> + mov lr, r12
> + mov pc, lr
> +
> +/*
> + * system_clock_init: Initialize core clock and bus clock.
> + * void system_clock_init(void)
> + */
> +system_clock_init:
> + ldr r0, =ELFIN_CLOCK_POWER_BASE /* 0x7e00f000 */
> +
> +#ifdef CONFIG_SYNC_MODE
> + ldr r1, [r0, #OTHERS_OFFSET]
> + mov r2, #0x40
> + orr r1, r1, r2
> + str r1, [r0, #OTHERS_OFFSET]
> +
> + nop
> + nop
> + nop
> + nop
> + nop
> +
> + ldr r2, =0x80
> + orr r1, r1, r2
> + str r1, [r0, #OTHERS_OFFSET]
> +
> +check_syncack:
> + ldr r1, [r0, #OTHERS_OFFSET]
> + ldr r2, =0xf00
> + and r1, r1, r2
> + cmp r1, #0xf00
> + bne check_syncack
> +#else /* ASYNC Mode */
> + nop
> + nop
> + nop
> + nop
> + nop
> +
> + ldr r1, [r0, #OTHERS_OFFSET]
> + bic r1, r1, #0xC0
> + orr r1, r1, #0x40
> + str r1, [r0, #OTHERS_OFFSET]
> +
> +wait_for_async:
> + ldr r1, [r0, #OTHERS_OFFSET]
> + and r1, r1, #0xf00
> + cmp r1, #0x0
> + bne wait_for_async
> +
> + ldr r1, [r0, #OTHERS_OFFSET]
> + bic r1, r1, #0x40
> + str r1, [r0, #OTHERS_OFFSET]
> +#endif
> +
> + mov r1, #0xff00
> + orr r1, r1, #0xff
> + str r1, [r0, #APLL_LOCK_OFFSET]
> + str r1, [r0, #MPLL_LOCK_OFFSET]
> +
> + /* Set Clock Divider */
> + ldr r1, [r0, #CLK_DIV0_OFFSET]
> + bic r1, r1, #0x30000
> + bic r1, r1, #0xff00
> + bic r1, r1, #0xff
> + ldr r2, =CLK_DIV_VAL
> + orr r1, r1, r2
> + str r1, [r0, #CLK_DIV0_OFFSET]
> +
> + ldr r1, =APLL_VAL
> + str r1, [r0, #APLL_CON_OFFSET]
> + ldr r1, =MPLL_VAL
> + str r1, [r0, #MPLL_CON_OFFSET]
> +
> + /* FOUT of EPLL is 96MHz */
> + ldr r1, =0x80200203
> + str r1, [r0, #EPLL_CON0_OFFSET]
> + ldr r1, =0x0
> + str r1, [r0, #EPLL_CON1_OFFSET]
> +
> + /* APLL, MPLL, EPLL select to Fout */
> + ldr r1, [r0, #CLK_SRC_OFFSET]
> + orr r1, r1, #0x7
> + str r1, [r0, #CLK_SRC_OFFSET]
> +
> + /* wait at least 200us to stablize all clock */
> + mov r1, #0x10000
> +1: subs r1, r1, #1
> + bne 1b
> +
> + /* Synchronization for VIC port */
> +#if defined(CONFIG_SYNC_MODE)
> + ldr r1, [r0, #OTHERS_OFFSET]
> + orr r1, r1, #0x20
> + str r1, [r0, #OTHERS_OFFSET]
> +#else
> + ldr r1, [r0, #OTHERS_OFFSET]
> + bic r1, r1, #0x20
> + str r1, [r0, #OTHERS_OFFSET]
> +#endif
> + mov pc, lr
> +
> +
> +#ifndef CONFIG_NAND_SPL
> +/*
> + * uart_asm_init: Initialize UART's pins
> + */
> +uart_asm_init:
> + /* set GPIO to enable UART */
> + ldr r0, =ELFIN_GPIO_BASE
> + ldr r1, =0x220022
> + str r1, [r0, #GPACON_OFFSET]
> + mov pc, lr
> +#endif
> +
> +#ifdef CONFIG_BOOT_NAND
> +/*
> + * NAND Interface init for SMDK6400
> + */
> +nand_asm_init:
> + ldr r0, =ELFIN_NAND_BASE
> + ldr r1, [r0, #NFCONF_OFFSET]
> + orr r1, r1, #0x70
> + orr r1, r1, #0x7700
> + str r1, [r0, #NFCONF_OFFSET]
> +
> + ldr r1, [r0, #NFCONT_OFFSET]
> + orr r1, r1, #0x07
> + str r1, [r0, #NFCONT_OFFSET]
> +
> + mov pc, lr
> +#endif
> diff --git a/board/friendly_arm/mini6410/mini6410.c b/board/friendly_arm/mini6410/mini6410.c
> new file mode 100644
> index 0000000..b96a23c
> --- /dev/null
> +++ b/board/friendly_arm/mini6410/mini6410.c
> @@ -0,0 +1,99 @@
> +/*
> + * (C) Copyright 2010
> + * Darius Augulis,<augulis.darius at gmail.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include<common.h>
> +#include<netdev.h>
> +#include<asm/arch/s3c6400.h>
> +
> +/* ------------------------------------------------------------------------- */
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +static inline void delay(unsigned long loops)
> +{
> + __asm__ volatile ("1:\n" "subs %0, %1, #1\n"
> + "bne 1b"
> + : "=r" (loops) : "0" (loops));
> +}
> +
> +/*
> + * Miscellaneous platform dependent initialisations
> + */
> +
> +#define DM9000_Tacs (0x0) // 0clk address set-up
> +#define DM9000_Tcos (0x4) // 4clk chip selection set-up
> +#define DM9000_Tacc (0xE) // 14clk access cycle
> +#define DM9000_Tcoh (0x1) // 1clk chip selection hold
> +#define DM9000_Tah (0x4) // 4clk address holding time
> +#define DM9000_Tacp (0x6) // 6clk page mode access cycle
> +#define DM9000_PMC (0x0) // normal(1data)page mode configuration
> +
> +static void dm9000_pre_init(void)
> +{
> + SROM_BW_REG&= ~(0xf<< 4);
> + SROM_BW_REG |= (1<< 7) | (1<< 6) | (1<< 4);
> + SROM_BC1_REG = ((DM9000_Tacs<< 28) + (DM9000_Tcos<< 24 ) +
> + (DM9000_Tacc<< 16) + (DM9000_Tcoh<< 12) +
> + (DM9000_Tah<< 8) + (DM9000_Tacp<< 4) + (DM9000_PMC));
> +
> +}
> +
> +int board_init(void)
> +{
> + dm9000_pre_init();
> +
> + gd->bd->bi_arch_number = MACH_TYPE;
> + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> +
> + return 0;
> +}
> +
> +int dram_init (void)
> +{
> + /* dram_init must store complete ramsize in gd->ram_size */
> + gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
> + PHYS_SDRAM_1_SIZE);
> + return 0;
> +}
> +
> +void dram_init_banksize(void)
> +{
> + gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> + gd->bd->bi_dram[0].size = get_ram_size((volatile void *)PHYS_SDRAM_1,
> + PHYS_SDRAM_1_SIZE);
> +}
> +
> +#ifdef CONFIG_DISPLAY_BOARDINFO
> +int checkboard(void)
> +{
> + printf("Board: MINI6410\n");
> + return 0;
> +}
> +#endif
> +
> +#ifdef CONFIG_CMD_NET
> +int board_eth_init(bd_t *bis)
> +{
> + return dm9000_initialize(bis);
> +}
> +#endif
> diff --git a/boards.cfg b/boards.cfg
> index 08e531e..54b3015 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -354,6 +354,7 @@ PM826_ROMBOOT_BIGFLASH powerpc mpc8260 pm826 - - PM826:BOOT_ROM,FLASH_32MB,
> imx31_litekit arm arm1136 - logicpd mx31
> omap2420h4 arm arm1136 - ti omap24xx
> tnetv107x_evm arm arm1176 tnetv107xevm ti tnetv107x
> +mini6410 arm arm1176 mini6410 friendly_arm s3c64xx
> armadillo arm arm720t
> modnet50 arm arm720t
> lpc2292sodimm arm arm720t - - lpc2292
> diff --git a/include/configs/mini6410.h b/include/configs/mini6410.h
> new file mode 100644
> index 0000000..e2dcbd4
> --- /dev/null
> +++ b/include/configs/mini6410.h
> @@ -0,0 +1,137 @@
> +/*
> + * (C) Copyright 2010
> + * Darius Augulis<augulis.darius at gmail.com>
> + *
> + * (C) Copyright 2008
> + * Guennadi Liakhovetki, DENX Software Engineering,<lg at denx.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/* High Level Configuration Options */
> +#define CONFIG_S3C6410 1
> +#define CONFIG_S3C64XX 1
> +#define CONFIG_MINI6410 1
> +
> +#define CONFIG_SYS_NO_FLASH 1
> +#define CONFIG_NAND_U_BOOT 1
> +
> +#define CONFIG_PERIPORT_REMAP
> +#define CONFIG_PERIPORT_BASE 0x70000000
> +#define CONFIG_PERIPORT_SIZE 0x13
> +
> +/* Relocation and internal SRAM options */
> +#define CONFIG_SYS_IRAM_BASE 0x0C000000 /* Internal SRAM base address */
> +#define CONFIG_SYS_IRAM_SIZE 0x2000 /* 8 KB of internal SRAM memory */
> +#define CONFIG_SYS_IRAM_END (CONFIG_SYS_IRAM_BASE + CONFIG_SYS_IRAM_SIZE)
> +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_IRAM_END - GENERATED_GBL_DATA_SIZE)
> +
> +/* SDRAM options */
> +#define CONFIG_SYS_SDRAM_BASE 0x50000000
> +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE /* memtest works on */
> +#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_TEXT_BASE /* 126MiB in DRAM */
> +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* default load address */
> +
> +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
> +#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
> +#define CONFIG_SYS_UBOOT_SIZE (1024 * 1024)
> +
> +#define CONFIG_NR_DRAM_BANKS 1
> +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
> +#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
> +
> +/* Environment options */
> +#define CONFIG_ENV_OVERWRITE
> +#define CONFIG_ENV_SIZE 0x20000
> +#define CONFIG_ENV_OFFSET 0x40000
> +#define CONFIG_ENV_IS_IN_NAND
> +
> +/* Miscellaneous configurable options */
> +#define CONFIG_SYS_LONGHELP
> +#define CONFIG_SYS_PROMPT "MINI6410 # "
> +#define CONFIG_SYS_CBSIZE 256
> +#define CONFIG_SYS_PBSIZE 384
> +#define CONFIG_SYS_MAXARGS 16
> +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
> +#define CONFIG_IDENT_STRING " for MINI6410"
> +
> +#define CONFIG_SYS_HZ 1000
> +#define CONFIG_SYS_CLK_FREQ 12000000
> +#define MACH_TYPE 2520
> +#define CONFIG_BOOTDELAY 5
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_CMDLINE_TAG
> +#define CONFIG_DISPLAY_CPUINFO
> +#define CONFIG_DISPLAY_BOARDINFO
> +#define CONFIG_ZERO_BOOTDELAY_CHECK
> +
> +#define CONFIG_CLK_533_133_66
> +#define CONFIG_SYNC_MODE
> +
> +/* Network */
> +#define CONFIG_NET_MULTI 1
> +#define CONFIG_DRIVER_DM9000 1
> +#define CONFIG_DM9000_NO_SROM 1
> +#define CONFIG_DM9000_BASE 0x18000000
> +#define DM9000_IO CONFIG_DM9000_BASE
> +#define DM9000_DATA (CONFIG_DM9000_BASE+4)
> +#define CONFIG_ETHADDR 00:01:02:03:04:05
> +#define CONFIG_IPADDR 192.168.1.20
> +#define CONFIG_SERVERIP 192.168.1.1
> +#define CONFIG_GATEWAYIP 192.168.1.1
> +#define CONFIG_NETMASK 255.255.255.0
> +
> +/* serial console configuration */
> +#define CONFIG_SERIAL1 1
> +#define CONFIG_SYS_HUSH_PARSER
> +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
> +
> +#define CONFIG_CMDLINE_EDITING
> +#define CONFIG_BAUDRATE 115200
> +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
> +#define CONFIG_BOOTCOMMAND "nand read 50100000 100000 300000; bootm 50100000"
> +#define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw console=ttySAC0 mini6410=0"
> +
> +/* Command definition */
> +#include<config_cmd_default.h>
> +#define CONFIG_CMD_CACHE
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_NAND
> +#define CONFIG_CMD_SAVEENV
> +
> +/* NAND configuration */
> +#define CONFIG_SYS_MAX_NAND_DEVICE 1
> +#define CONFIG_SYS_NAND_BASE 0x70200010
> +#define CONFIG_BOOT_NAND
> +#define CONFIG_NAND
> +#define CONFIG_NAND_S3C64XX
> +
> +#define CONFIG_SYS_NAND_PAGE_SIZE (2 * 1024)
> +#define CONFIG_SYS_NAND_PAGE_COUNT 64
> +#define CONFIG_SYS_NAND_BLOCK_SIZE (CONFIG_SYS_NAND_PAGE_SIZE * CONFIG_SYS_NAND_PAGE_COUNT)
> +
> +#define CONFIG_SYS_NAND_U_BOOT_DST 0x57E00000
> +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
> +
> +#define CONFIG_SYS_NAND_U_BOOT_OFFS (4 * 1024)
> +#define CONFIG_SYS_NAND_U_BOOT_SIZE (252 * 1024)
> +
> +#endif /* __CONFIG_H */
> diff --git a/nand_spl/board/friendly_arm/mini6410/Makefile b/nand_spl/board/friendly_arm/mini6410/Makefile
> new file mode 100644
> index 0000000..71aaed1
> --- /dev/null
> +++ b/nand_spl/board/friendly_arm/mini6410/Makefile
> @@ -0,0 +1,107 @@
> +#
> +# (C) Copyright 2010
> +# Darius Augulis,<augulis.darius at gmail.com>
> +#
> +# (C) Copyright 2006-2007
> +# Stefan Roese, DENX Software Engineering, sr at denx.de.
> +#
> +# (C) Copyright 2008
> +# Guennadi Liakhovetki, DENX Software Engineering,<lg at denx.de>
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +CONFIG_NAND_SPL = y
> +
> +include $(TOPDIR)/config.mk
> +include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
> +
> +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
> +LDFLAGS = -Bstatic -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(PLATFORM_LDFLAGS)
> +AFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
> +CFLAGS += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
> +
> +SOBJS = start.o cpu_init.o lowlevel_init.o
> +COBJS = nand_boot_s3c.o s3c64xx.o
> +
> +SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
> +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
> +__OBJS := $(SOBJS) $(COBJS)
> +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
> +
> +nandobj := $(OBJTREE)/nand_spl/
> +
> +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
> +
> +all: $(obj).depend $(ALL)
> +
> +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
> + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
> +
> +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
> + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
> +
> +$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
> + cd $(LNDIR)&& $(LD) $(LDFLAGS) $(__OBJS) \
> + -Map $(nandobj)u-boot-spl.map \
> + -o $(nandobj)u-boot-spl
> +
> +$(nandobj)u-boot.lds: $(LDSCRIPT)
> + $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P -<$^>$@
> +
> +# create symbolic links for common files
> +
> +# from cpu directory
> +$(obj)start.S:
> + @rm -f $@
> + @ln -s $(TOPDIR)/arch/arm/cpu/arm1176/start.S $@
> +
> +# from SoC directory
> +$(obj)cpu_init.S:
> + @rm -f $@
> + @ln -s $(TOPDIR)/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S $@
> +
> +# from board directory
> +$(obj)lowlevel_init.S:
> + @rm -f $@
> + @ln -s $(TOPDIR)/board/friendly_arm/mini6410/lowlevel_init.S $@
> +
> +# from nand_spl directory
> +$(obj)nand_boot_s3c.c:
> + @rm -f $@
> + @ln -s $(TOPDIR)/nand_spl/nand_boot_s3c.c $@
> +
> +$(obj)s3c64xx.c:
> + @rm -f $@
> + @ln -s $(TOPDIR)/drivers/mtd/nand/s3c64xx.c $@
> +
> +#########################################################################
> +
> +$(obj)%.o: $(obj)%.S
> + $(CC) $(AFLAGS) -c -o $@ $<
> +
> +$(obj)%.o: $(obj)%.c
> + $(CC) $(CFLAGS) -c -o $@ $<
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/nand_spl/board/friendly_arm/mini6410/config.mk b/nand_spl/board/friendly_arm/mini6410/config.mk
> new file mode 100644
> index 0000000..d682446
> --- /dev/null
> +++ b/nand_spl/board/friendly_arm/mini6410/config.mk
> @@ -0,0 +1,7 @@
> +# PAD_TO used to generate a 4kByte binary needed for the combined image
> +# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 4096
> +PAD_TO := $(shell expr $$(($(CONFIG_SYS_TEXT_BASE) + 4096)))
> +
> +ifeq ($(debug),1)
> +PLATFORM_CPPFLAGS += -DDEBUG
> +endif
> diff --git a/nand_spl/board/friendly_arm/mini6410/u-boot.lds b/nand_spl/board/friendly_arm/mini6410/u-boot.lds
> new file mode 100644
> index 0000000..4ee6d17
> --- /dev/null
> +++ b/nand_spl/board/friendly_arm/mini6410/u-boot.lds
> @@ -0,0 +1,85 @@
> +/*
> + * (C) Copyright 2010
> + * Darius Augulis,<augulis.darius at gmail.com>
> + *
> + * (C) Copyright 2002
> + * Gary Jennejohn, DENX Software Engineering,<garyj at denx.de>
> + *
> + * (C) Copyright 2008
> + * Guennadi Liakhovetki, DENX Software Engineering,<lg at denx.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
> +OUTPUT_ARCH(arm)
> +ENTRY(_start)
> +SECTIONS
> +{
> + . = 0x00000000;
> +
> + . = ALIGN(4);
> + .text :
> + {
> + start.o (.text)
> + cpu_init.o (.text)
> + nand_boot_s3c.o (.text)
> + *(.text)
> + }
> +
> + . = ALIGN(4);
> + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
> +
> + . = ALIGN(4);
> + .data : {
> + *(.data)
> + __datarel_start = .;
> + *(.data.rel)
> + __datarelrolocal_start = .;
> + *(.data.rel.ro.local)
> + __datarellocal_start = .;
> + *(.data.rel.local)
> + __datarelro_start = .;
> + *(.data.rel.ro)
> + }
> +
> + . = ALIGN(4);
> + __rel_dyn_start = .;
> + .rel.dyn : { *(.rel.dyn) }
> + __rel_dyn_end = .;
> +
> + __dynsym_start = .;
> + .dynsym : { *(.dynsym) }
> +
> + . = .;
> + __u_boot_cmd_start = .;
> + .u_boot_cmd : { *(.u_boot_cmd) }
> + __u_boot_cmd_end = .;
> +
> + . = ALIGN(4);
> + __bss_start = .;
> + .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
> + _end = .;
> +
> + /DISCARD/ : { *(.dynstr*) }
> + /DISCARD/ : { *(.dynamic*) }
> + /DISCARD/ : { *(.plt*) }
> + /DISCARD/ : { *(.interp*) }
> + /DISCARD/ : { *(.gnu*) }
> +}
> diff --git a/nand_spl/nand_boot_s3c.c b/nand_spl/nand_boot_s3c.c
> new file mode 100644
> index 0000000..d0c5534
> --- /dev/null
> +++ b/nand_spl/nand_boot_s3c.c
> @@ -0,0 +1,131 @@
> +/*
> + * (C) Copyright 2010
> + * Darius Augulis,<augulis.darius at gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include<config.h>
> +#include<version.h>
> +#include<common.h>
> +#include<nand.h>
> +#include<asm/io.h>
> +#include<asm/arch/s3c6400.h>
> +
> +static void disable_ce(void)
> +{
> + int val = readl(NFCONT);
> + writel(val | (1<< 1), NFCONT);
> +}
> +
> +static void enable_ce(void)
> +{
> + int val = readl(NFCONT);
> + writel(val& ~(1<< 1), NFCONT);
> +}
> +
> +static int nand_is_ready(void)
> +{
> + return readl(NFSTAT)& 0x01;
> +}
> +
> +static void nand_read_page(unsigned int block, unsigned int page, uchar *buf)
> +{
> + int i;
> +
> + writel(NAND_CMD_READ0, NFCMMD);
> +
> + writel(0, NFADDR);
> + writel(0, NFADDR);
> + writel((page& 0x3f) | ((block<< 6)& 0xC0), NFADDR);
> + writel((block>> 2)& 0xff, NFADDR);
> + writel((block>> 16)& 0xff, NFADDR);
> +
> + writel(NAND_CMD_READSTART, NFCMMD);
> +
> + while(!nand_is_ready());
> +
> + for(i = 0; i< CONFIG_SYS_NAND_PAGE_SIZE; i++)
> + buf[i] = readb(NFDATA);
> +}
> +
> +static int nand_load(unsigned int offs, unsigned int uboot_size, uchar *dst)
> +{
> + unsigned int block, lastblock, page;
> +
> + /* offs has to be aligned to a page address! */
> + block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
> + lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
> + page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
> +
> + while (block<= lastblock) {
> + while (page< CONFIG_SYS_NAND_PAGE_COUNT) {
> + nand_read_page(block, page, dst);
> + dst += CONFIG_SYS_NAND_PAGE_SIZE;
> + page++;
> + }
> + page = 0;
> + block++;
> + }
> +
> + return;
> +}
> +
> +#if defined(CONFIG_ARM)&& !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
> +void board_init_f (ulong bootflag)
> +{
> + relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
> + CONFIG_SYS_TEXT_BASE);
> +}
> +#endif
> +
> +static void nand_init_hw(void)
> +{
> + int val;
> +
> + /* Set timing */
> + val = readl(NFCONF);
> + writel(val | 0x7770, NFCONF);
> +
> + /* Enable NFC, release both CE's */
> + val = readl(NFCONT);
> + writel(val | 0x07, NFCONT);
> +}
> +
> +/*
> + * The main entry for NAND booting. It's necessary that SDRAM is already
> + * configured and available since this code loads the main U-Boot image
> + * from NAND into SDRAM and starts it from there.
> + */
> +void nand_boot(void)
> +{
> + __attribute__((noreturn)) void (*uboot)(void);
> +
> + /* Init nand controller */
> + nand_init_hw();
> +
> + enable_ce();
> +
> + /* Load U-Boot image from NAND into RAM */
> + nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS,
> + CONFIG_SYS_NAND_U_BOOT_SIZE,
> + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
> +
> + disable_ce();
> +
> + uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
> + (*uboot)();
> +}
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