[U-Boot] [PATCH 7/7] 4xx: Cleanup for partial linking and --gc-sections

[Stefan Roese]

Hi Wolfgang,

On Tuesday 23 November 2010 20:55:03 Wolfgang Denk wrote:
> > > --- a/arch/powerpc/cpu/ppc4xx/Makefile
> > > +++ b/arch/powerpc/cpu/ppc4xx/Makefile
> > > @@ -37,9 +37,9 @@ COBJS	:= 40x_spd_sdram.o
> > > 
> > >  ifndef CONFIG_NAND_SPL
> > >  ifndef CONFIG_NAND_U_BOOT
> > >  COBJS	+= 44x_spd_ddr.o
> > > 
> > > +COBJS-$(CONFIG_SDRAM_PPC4xx_IBM_DDR2) += 44x_spd_ddr2.o
> > > 
> > >  endif
> > >  endif
> > > 
> > > -COBJS-$(CONFIG_SDRAM_PPC4xx_IBM_DDR2) += 44x_spd_ddr2.o
> > 
> > This change introduces the problem with the kilauea/haleakala NAND
> > booting images. Yes, I am aware that without this change,
> > canyonlands_nand fails to build. I noticed this too right now. I'll send
> > another patch to fix this canyonlands_nand build problem shortly.
> 
> Without this, kilauea/haleakala NAND boot configurations load the
> 44x_spd_ddr2 init code, which you said was not the correct thing.
> 
> So which is correct?

I said that denali_spd_ddr2.c was incorrect. Note that that 44x_spd_ddr2.c not 
only has code for SPD type DDR2 inititalization but also fixed init code for 
this DDR2 controller. So its a bit of a misnomer. I can rename this file but I 
suggest to do this at a later time.

Please also note, that I sent a patch that fixes those problems "ppc4xx: Fix 
build problems of IBM DDR2 NAND booting targets". Its a add-on patch to your 
patchset and you can squash it into your patches if you prefer (I mentioned 
this in the patch comments of this patch).

Cheers,
Stefan

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