[U-Boot] [PATCH] ppc4xx: Change tsr/tcr macros to upper case
Stefan Roese
sr at denx.de
Mon Oct 4 11:09:40 CEST 2010
Remove uneccessary functions to access the TCR/TSR registers as well.
Signed-off-by: Stefan Roese <sr at denx.de>
---
arch/powerpc/cpu/ppc4xx/cpu_init.c | 8 ++++----
arch/powerpc/cpu/ppc4xx/interrupts.c | 7 -------
arch/powerpc/cpu/ppc4xx/traps.c | 11 +----------
3 files changed, 5 insertions(+), 21 deletions(-)
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index d54b30e..fe97d53 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -341,7 +341,7 @@ cpu_init_f (void)
#endif
#if defined(CONFIG_WATCHDOG)
- val = mfspr(tcr);
+ val = mfspr(SPRN_TCR);
#if defined(CONFIG_440EP) || defined(CONFIG_440GR)
val |= 0xb8000000; /* generate system reset after 1.34 seconds */
#elif defined(CONFIG_440EPX)
@@ -353,11 +353,11 @@ cpu_init_f (void)
val &= ~0x30000000; /* clear WRC bits */
val |= CONFIG_SYS_4xx_RESET_TYPE << 28; /* set board specific WRC type */
#endif
- mtspr(tcr, val);
+ mtspr(SPRN_TCR, val);
- val = mfspr(tsr);
+ val = mfspr(SPRN_TSR);
val |= 0x80000000; /* enable watchdog timer */
- mtspr(tsr, val);
+ mtspr(SPRN_TSR, val);
reset_4xx_watchdog();
#endif /* CONFIG_WATCHDOG */
diff --git a/arch/powerpc/cpu/ppc4xx/interrupts.c b/arch/powerpc/cpu/ppc4xx/interrupts.c
index c2d4973..d0bca92 100644
--- a/arch/powerpc/cpu/ppc4xx/interrupts.c
+++ b/arch/powerpc/cpu/ppc4xx/interrupts.c
@@ -67,13 +67,6 @@ static __inline__ void set_pit(unsigned long val)
asm volatile("mtpit %0" : : "r" (val));
}
-
-static __inline__ void set_tcr(unsigned long val)
-{
- asm volatile("mttcr %0" : : "r" (val));
-}
-
-
static __inline__ void set_evpr(unsigned long val)
{
asm volatile("mtevpr %0" : : "r" (val));
diff --git a/arch/powerpc/cpu/ppc4xx/traps.c b/arch/powerpc/cpu/ppc4xx/traps.c
index b5562ad..9baa7a1 100644
--- a/arch/powerpc/cpu/ppc4xx/traps.c
+++ b/arch/powerpc/cpu/ppc4xx/traps.c
@@ -46,15 +46,6 @@ extern unsigned long search_exception_table(unsigned long);
*/
#define END_OF_MEM (gd->bd->bi_memstart + gd->bd->bi_memsize)
-static __inline__ void set_tsr(unsigned long val)
-{
-#if defined(CONFIG_440)
- asm volatile("mtspr 0x150, %0" : : "r" (val));
-#else
- asm volatile("mttsr %0" : : "r" (val));
-#endif
-}
-
static __inline__ unsigned long get_esr(void)
{
unsigned long val;
@@ -364,7 +355,7 @@ DecrementerPITException(struct pt_regs *regs)
/*
* Reset PIT interrupt
*/
- set_tsr(0x08000000);
+ mtspr(SPRN_TSR, 0x08000000);
/*
* Call timer_interrupt routine in interrupts.c
--
1.7.3.1
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