[U-Boot] [RFC] [PATCH V2] arm: arm926ejs: use ELF relocations
Wolfgang Denk
wd at denx.de
Tue Oct 5 08:45:16 CEST 2010
Dear Albert Aribaud,
In message <1286260287-1571-1-git-send-email-albert.aribaud at free.fr> you wrote:
> HISTORY:
>
> V1 Initial patch
> V2 Rebased on latest mainline master
>
> This patch is *not* a submission for master!
With the following additional patches I got the code working on the
Qong board (i.MX31 = arm1136):
diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 8b63192..40962a5 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -89,48 +89,35 @@ _end_vect:
_TEXT_BASE:
.word TEXT_BASE
-#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _armboot_start
-_armboot_start:
- .word _start
-#endif
-
/*
* These are defined in the board-specific linker script.
+ * Subtracting _start from them lets the linker put their
+ * relative position in the executable instead of leaving
+ * them null.
*/
-.globl _bss_start
-_bss_start:
- .word __bss_start
-
-.globl _bss_end
-_bss_end:
- .word _end
-
-#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
-.globl _datarel_start
-_datarel_start:
- .word __datarel_start
+.globl _bss_start_ofs
+_bss_start_ofs:
+ .word __bss_start - _start
-.globl _datarelrolocal_start
-_datarelrolocal_start:
- .word __datarelrolocal_start
+.globl _bss_end_ofs
+_bss_end_ofs:
+ .word _end - _start
-.globl _datarellocal_start
-_datarellocal_start:
- .word __datarellocal_start
+.globl _datarel_start_ofs
+_datarel_start_ofs:
+ .word __datarel_start - _start
-.globl _datarelro_start
-_datarelro_start:
- .word __datarelro_start
+.globl _datarelrolocal_start_ofs
+_datarelrolocal_start_ofs:
+ .word __datarelrolocal_start - _start
-.globl _got_start
-_got_start:
- .word __got_start
+.globl _datarellocal_start_ofs
+_datarellocal_start_ofs:
+ .word __datarellocal_start - _start
-.globl _got_end
-_got_end:
- .word __got_end
-#endif
+.globl _datarelro_start_ofs
+_datarelro_start_ofs:
+ .word __datarelro_start - _start
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
@@ -225,9 +212,8 @@ stack_setup:
adr r0, _start
ldr r2, _TEXT_BASE
- ldr r3, _bss_start
- sub r2, r3, r2 /* r2 <- size of armboot */
- add r2, r0, r2 /* r2 <- source end address */
+ ldr r3, _bss_start_ofs
+ add r2, r0, r3 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
@@ -239,36 +225,54 @@ copy_loop:
ble copy_loop
#ifndef CONFIG_PRELOADER
- /* fix got entries */
- ldr r1, _TEXT_BASE
- mov r0, r7 /* reloc addr */
- ldr r2, _got_start /* addr in Flash */
- ldr r3, _got_end /* addr in Flash */
- sub r3, r3, r1
- add r3, r3, r0
- sub r2, r2, r1
- add r2, r2, r0
-
+ /*
+ * fix .rel.dyn relocations
+ */
+ ldr r0, _TEXT_BASE /* r0 <- Text base */
+ sub r9, r7, r0 /* r9 <- relocation offset */
+ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
+ add r10, r10, r0 /* r10 <- sym table in FLASH */
+ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
+ add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
+ ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
+ add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
fixloop:
- ldr r4, [r2]
- sub r4, r4, r1
- add r4, r4, r0
- str r4, [r2]
- add r2, r2, #4
+ ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
+ add r0, r9 /* r0 <- location to fix up in RAM */
+ ldr r1, [r2, #4]
+ and r8, r1, #0xff
+ cmp r8, #23 /* relative fixup? */
+ beq fixrel
+ cmp r8, #2 /* absolute fixup? */
+ beq fixabs
+ /* ignore unknown type of fixup */
+ b fixnext
+fixabs:
+ /* absolute fix: set location to (offset) symbol value */
+ mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
+ add r1, r10, r1 /* r1 <- address of symbol in table */
+ ldr r1, [r1, #4] /* r1 <- symbol value */
+ add r1, r9 /* r1 <- relocated sym addr */
+ b fixnext
+fixrel:
+ /* relative fix: increase location by offset */
+ ldr r1, [r0]
+ add r1, r1, r9
+fixnext:
+ str r1, [r0]
+ add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
- bne fixloop
+ ble fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
- ldr r0, _bss_start
- ldr r1, _bss_end
+ ldr r0, _bss_start_ofs
+ ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
- sub r0, r0, r3
add r0, r0, r4
- sub r1, r1, r3
add r1, r1, r4
mov r2, #0x00000000 /* clear */
@@ -283,24 +287,34 @@ clbss_l:str r2, [r0] /* clear loop... */
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
- ldr pc, _nand_boot
-
-_nand_boot: .word nand_boot
+ ldr r0, _nand_boot_ofs
+ adr r1, _start
+ add pc, r0, r1
+_nand_boot_ofs
+ : .word nand_boot - _start
#else
jump_2_ram:
- ldr r0, _TEXT_BASE
- ldr r2, _board_init_r
- sub r2, r2, r0
- add r2, r2, r7 /* position from board_init_r in RAM */
+ ldr r0, _board_init_r_ofs
+ adr r1, _start
+ add r0, r0, r1
+ add lr, r0, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
- mov lr, r2
mov pc, lr
-_board_init_r: .word board_init_r
+_board_init_r_ofs:
+ .word board_init_r - _start
#endif
+
+_rel_dyn_start_ofs:
+ .word __rel_dyn_start - _start
+_rel_dyn_end_ofs:
+ .word __rel_dyn_end - _start
+_dynsym_start_ofs:
+ .word __dynsym_start - _start
+
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
@@ -375,8 +389,11 @@ stack_setup:
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
- ldr r0, _bss_start /* find start of bss segment */
- ldr r1, _bss_end /* stop here */
+ adr r2, _start
+ ldr r0, _bss_start_ofs /* find start of bss segment */
+ add r0, r0, r2
+ ldr r1, _bss_end_ofs /* stop here */
+ add r1, r1, r2
mov r2, #0x00000000 /* clear */
#ifndef CONFIG_PRELOADER
@@ -386,15 +403,19 @@ clbss_l:str r2, [r0] /* clear loop... */
bne clbss_l
#endif
- ldr pc, _start_armboot
+ ldr r0, _start_armboot_ofs
+ adr r1, _start
+ add r0, r0, r1
+ ldr pc, r0
+_start_armboot_ofs:
#ifdef CONFIG_NAND_SPL
-_start_armboot: .word nand_boot
+ .word nand_boot - _start
#else
#ifdef CONFIG_ONENAND_IPL
-_start_armboot: .word start_oneboot
+ .word start_oneboot - _start
#else
-_start_armboot: .word start_armboot
+ .word start_armboot - _start
#endif /* CONFIG_ONENAND_IPL */
#endif /* CONFIG_NAND_SPL */
@@ -487,7 +508,7 @@ cpu_init_crit:
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack
#else
- ldr r2, _armboot_start
+ adr r2, _start
sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
#endif
@@ -524,8 +545,8 @@ cpu_init_crit:
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode)
#else
- ldr r13, _armboot_start @ setup our mode stack (enter in banked mode)
- sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
+ adr r13, _start @ setup our mode stack (enter in banked mode)
+ sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
#endif
diff --git a/arch/arm/cpu/arm1136/u-boot.lds b/arch/arm/cpu/arm1136/u-boot.lds
index 1db4b49..99bd6d5 100644
--- a/arch/arm/cpu/arm1136/u-boot.lds
+++ b/arch/arm/cpu/arm1136/u-boot.lds
@@ -59,6 +59,14 @@ SECTIONS
*(.data.rel.ro)
}
+ . = ALIGN(4);
+ __rel_dyn_start = .;
+ .rel.dyn : { *(.rel.dyn) }
+ __rel_dyn_end = .;
+
+ __dynsym_start = .;
+ .dynsym : { *(.dynsym) }
+
__got_start = .;
. = ALIGN(4);
.got : { *(.got) }
diff --git a/include/configs/qong.h b/include/configs/qong.h
index 7a68b7b..03ed1b0 100644
--- a/include/configs/qong.h
+++ b/include/configs/qong.h
@@ -283,7 +283,7 @@ extern int qong_nand_rdy(void *chip);
"128k(env2),2432k(kernel),13m(ramdisk),-(user)"
/* additions for new relocation code, must added to all boards */
-#undef CONFIG_SYS_ARM_WITHOUT_RELOC /* This board is tested with relocation support */
+#define CONFIG_RELOC_FIXUP_WORKS
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_END IRAM_SIZE
Thanks a lot!
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The use of COBOL cripples the mind; its teaching should, therefore,
be regarded as a criminal offence.
-- Edsger W. Dijkstra, SIGPLAN Notices, Volume 17, Number 5
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