[U-Boot] Question about PCIe configuration

Swarthout Edward L-SWARTHOU SWARTHOU at freescale.com
Thu Oct 7 16:33:05 CEST 2010


From: Carlos Roberto Moratelli 
> 
> Rigth! I just enabled CONFIG_PCIE1 flag and the PCIE1 bus is detected.
> Now I have this new log:
> 
> 
>     PCIE1 connected to Slot1 as Root Complex (base address ffe0a000) 
> Outbound memory range: f8000000:100000000 PCICSRBAR @ 0xf7f00000 R0 
> bus_start: 0 phys_start: 0 size: 8000000 PCI reg:0 
> 0000000c10000000:f800000008000000 0000000000000001 0210def0 PCI reg:1 
> 0000000fffc10000:0000000000010000 0000000100000001 0210def0 PCI reg:2 
> 0000000fffe00000:f7f0000000100000 0000010000000001 0210def0 PCI reg:3 
> 0000000000000000:0000000008000000 0000010800000001 0210def0

> ....PCIE link error.  Skipping scan.LTSSM=0x08

The LTSSM value of 8 indicates the problem.  See:

"Table 18-111. PEX_LTSSM_STAT Status Codes"
 8 - "Polling compliance"

This shows the 8536 is fine and detects the device's receivers on the
bus, but the device has not responded with a correct training sequence.

There are many potential causes for the device not responding:
1. device powered on?
2. have correct clocks?
3. if an fpga, is it loaded?
4. is it out of reset?

What is the device?  Can you query it with a jtag probe?

>     PCIE1 on bus 01 - 01
> 
> I was expecting to find a peripherical on PCIE1 bus. I have a switch 
> chip connected to Serdes 1 lane A.

I see.  What switch?  Is it on a card or directly on the board?
Can you probe reset,  power, and clocks?

> pci_init_board: devdisr=40900, sdrs2_io_sel=7, io_sel=7  Serdes2 
> disalbed
> 
> How you can see, serdes 1 is enabled and working with pcie1 
> (io_sel=7). It appears that something is not correctly configured, but

> I have no idea about what.

This is all correct.

> > > 
> > >     PCIE2: disabled
> > > 
> > >     PCI: 32 bit, 66 MHz, sync, host, arbiter (base
> > ...
> > >                Scanning PCI bus 00
> > >     PCIE1 on bus 00 - 00
> > 
> > This is a code bug, it really should say is PCI1 and not PCIE1.
> 
> Yes! That was a bit confused.
> 
> 
> I will appreciate some tip to deal with that issue.

You can read the ltssm register from the prompt and on a working link
you will see 16:

=> pci d 1.0 404 1
00000404: 00000016

-Ed



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