[U-Boot] [PATCH] armv7, beagle: Second SDRAM bank don;t work

[Steve Sakoman]

On Thu, Oct 14, 2010 at 1:03 AM, Heiko Schocher <hs at denx.de> wrote:
> since commit 3667cbeed5e3c4067e624e52a916b1ebb02c8f05
> on beagle board the second sdram bank didn;t longer
> work. Since this patch sdram settings just get copied
> from bank a, but CMD_NOP, CMD_PRECHARGE, CMD_AUTOREFRESH
> are not executed and after that mr register is also
> not updated. This patch adds this for the bank b.
>
> Signed-off-by: Heiko Schocher <hs at denx.de>
> cc: Steve Sakoman <steve at sakoman.com>
> cc: Sandeep Paulraj <s-paulraj at ti.com>
> cc: Wolfgang Denk <wd at denx.de>
> ---
> Wolfgang, this patch should also be added to u-boot-arm elf_reloc
>
>  arch/arm/cpu/armv7/omap3/sdrc.c |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
> index 2719bb5..3087096 100644
> --- a/arch/arm/cpu/armv7/omap3/sdrc.c
> +++ b/arch/arm/cpu/armv7/omap3/sdrc.c
> @@ -149,6 +149,13 @@ void do_sdrc_init(u32 cs, u32 early)
>                        &sdrc_actim_base1->ctrla);
>                writel(readl(&sdrc_actim_base0->ctrlb),
>                        &sdrc_actim_base1->ctrlb);
> +
> +               writel(CMD_NOP, &sdrc_base->cs[cs].manual);
> +               writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
> +               writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
> +               writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
> +               writel(readl(&sdrc_base->cs[CS0].mr),
> +                       &sdrc_base->cs[CS1].mr);
>        }
>
>        /*
> --
> 1.7.2.3

I tested this on Overos with 3 brands of POP memory and both 35XX and
37XX processors.  Seemed to do no harm on any combination, so:

Acked-by: Steve Sakoman <steve.sakoman at linaro.org>
Tested-by: Steve Sakoman <steve.sakoman at linaro.org>