[U-Boot] [PATCH][v0] RTC driver for PT7C4338 chip.

Priyanka Jain Priyanka.Jain at freescale.com
Wed Oct 20 10:40:32 CEST 2010


PT7C4338 chip is manufactured by Pericom Technology Inc.
It is a serial real-time clock which provides:
1)Low-power clock/calendar.
2)Programmable square-wave output.
It has 56 bytes of nonvolatile RAM.

Freescale P1010RDB uses PT7C4338 as RTC.

Signed-off-by: Priyanka Jain <Priyanka.Jain at freescale.com>
Acked-by: Timur Tabi <timur at freescale.com>
---
 drivers/rtc/Makefile   |    1 +
 drivers/rtc/pt7c4338.c |  161 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 162 insertions(+), 0 deletions(-)
 create mode 100644 drivers/rtc/pt7c4338.c

diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 772a49a..a6dda91 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -62,6 +62,7 @@ COBJS-$(CONFIG_RTC_RX8025) += rx8025.o
 COBJS-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o
 COBJS-$(CONFIG_RTC_S3C44B0) += s3c44b0_rtc.o
 COBJS-$(CONFIG_RTC_X1205) += x1205.o
+COBJS-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
 
 COBJS	:= $(sort $(COBJS-y))
 SRCS	:= $(COBJS:.o=.c)
diff --git a/drivers/rtc/pt7c4338.c b/drivers/rtc/pt7c4338.c
new file mode 100644
index 0000000..5ce2afc
--- /dev/null
+++ b/drivers/rtc/pt7c4338.c
@@ -0,0 +1,161 @@
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * Author:	Priyanka Jain <Priyanka.Jain at freescale.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+/*
+ * This file provides Date & Time support (no alarms) for PT7C4338 chip.
+ *
+ * This file is based on drivers/rtc/ds1337.c
+ *
+ * PT7C4338 chip is manufactured by Pericom Technology Inc.
+ * It is a serial real-time clock which provides
+ * 1)Low-power clock/calendar.
+ * 2)Programmable square-wave output.
+ * It has 56 bytes of nonvolatile RAM.
+ *
+ * Freescale P1010RDB uses PT7C4338 as RTC.
+ */
+
+
+#include <common.h>
+#include <command.h>
+#include <rtc.h>
+#include <i2c.h>
+
+
+/* RTC register addresses */
+#define RTC_SEC_REG_ADDR        0x0
+#define RTC_MIN_REG_ADDR        0x1
+#define RTC_HR_REG_ADDR         0x2
+#define RTC_DAY_REG_ADDR        0x3
+#define RTC_DATE_REG_ADDR       0x4
+#define RTC_MON_REG_ADDR        0x5
+#define RTC_YR_REG_ADDR         0x6
+#define RTC_CTL_STAT_REG_ADDR   0x7
+
+/* RTC second register address bit */
+#define RTC_SEC_BIT_CH		0x80	/* Clock Halt (in Register 0) */
+
+/* RTC control and status register bits */
+#define RTC_CTL_STAT_BIT_RS0    0x1	/* Rate select 0 */
+#define RTC_CTL_STAT_BIT_RS1    0x2	/* Rate select 1 */
+#define RTC_CTL_STAT_BIT_SQWE   0x10	/* Square Wave Enable */
+#define RTC_CTL_STAT_BIT_OSF    0x20	/* Oscillator Stop Flag */
+#define RTC_CTL_STAT_BIT_OUT    0x80	/* Output Level Control */
+
+/* RTC reset value */
+#define RTC_PT7C4338_RESET_VAL \
+	(RTC_CTL_STAT_BIT_RS0 | RTC_CTL_STAT_BIT_RS1 | RTC_CTL_STAT_BIT_OUT)
+
+
+/****** Helper functions ****************************************/
+
+static u8 rtc_read(u8 reg)
+{
+	return i2c_reg_read(CONFIG_SYS_I2C_RTC_ADDR, reg);
+}
+
+static void rtc_write(u8 reg, u8 val)
+{
+	i2c_reg_write(CONFIG_SYS_I2C_RTC_ADDR, reg, val);
+}
+
+/****************************************************************/
+
+
+/* Get the current time from the RTC */
+int rtc_get(struct rtc_time *tmp)
+{
+	int ret = 0;
+	u8 sec, min, hour, mday, wday, mon, year, ctl_stat;
+
+	ctl_stat = rtc_read(RTC_CTL_STAT_REG_ADDR);
+	sec = rtc_read(RTC_SEC_REG_ADDR);
+	min = rtc_read(RTC_MIN_REG_ADDR);
+	hour = rtc_read(RTC_HR_REG_ADDR);
+	wday = rtc_read(RTC_DAY_REG_ADDR);
+	mday = rtc_read(RTC_DATE_REG_ADDR);
+	mon = rtc_read(RTC_MON_REG_ADDR);
+	year = rtc_read(RTC_YR_REG_ADDR);
+	debug("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
+		"hr: %02x min: %02x sec: %02x control_status: %02x\n",
+		year, mon, mday, wday, hour, min, sec, ctl_stat);
+
+	if (ctl_stat & RTC_CTL_STAT_BIT_OSF) {
+		printf("### Warning: RTC oscillator has stopped\n");
+		/* clear the OSF flag */
+		rtc_write(RTC_CTL_STAT_REG_ADDR,
+			rtc_read(RTC_CTL_STAT_REG_ADDR)\
+			& ~RTC_CTL_STAT_BIT_OSF);
+		ret = -1;
+	}
+
+	if (sec & RTC_SEC_BIT_CH) {
+		printf("### Warning: RTC oscillator has stopped\n");
+		/* clear the CH flag */
+		rtc_write(RTC_SEC_REG_ADDR,
+			rtc_read(RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH);
+		ret = -1;
+	}
+
+	tmp->tm_sec = bcd2bin(sec & 0x7F);
+	tmp->tm_min = bcd2bin(min & 0x7F);
+	tmp->tm_hour = bcd2bin(hour & 0x3F);
+	tmp->tm_mday = bcd2bin(mday & 0x3F);
+	tmp->tm_mon = bcd2bin(mon & 0x1F);
+	tmp->tm_year = bcd2bin(year) + 2000;
+	tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
+	tmp->tm_yday = 0;
+	tmp->tm_isdst = 0;
+	debug("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
+		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+	return ret;
+}
+
+/* Set the RTC */
+int rtc_set(struct rtc_time *tmp)
+{
+	debug("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
+		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+	rtc_write(RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
+	rtc_write(RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon));
+	rtc_write(RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
+	rtc_write(RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
+	rtc_write(RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
+	rtc_write(RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
+	rtc_write(RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
+
+	return 0;
+}
+
+/* Reset the RTC */
+void rtc_reset(void)
+{
+	rtc_write(RTC_SEC_REG_ADDR, 0x00);	/* clearing Clock Halt	*/
+	rtc_write(RTC_CTL_STAT_REG_ADDR, RTC_PT7C4338_RESET_VAL);
+}
-- 
1.6.5.6




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