[U-Boot] [PATCH v2] mmc: omap: timeout counter fix

[Ghorai, Sukumar]

> -----Original Message-----
> From: u-boot-bounces at lists.denx.de [mailto:u-boot-bounces at lists.denx.de]
> On Behalf Of Wolfgang Denk
> Sent: Tuesday, October 26, 2010 10:06 AM
> To: Menon, Nishanth
> Cc: u-boot
> Subject: Re: [U-Boot] [PATCH v2] mmc: omap: timeout counter fix
> 
> Dear Nishanth Menon,
> 
> In message <1288054924-24989-1-git-send-email-nm at ti.com> you wrote:
> > Having a loop with a counter is no timing guarentee for timing
> > accuracy or compiler optimizations. For e.g. the same loop counter
> > which runs when the MPU is running at 600MHz will timeout in around
> > half the time when running at 1GHz. or the example where GCC 4.5
> > compiles with different optimization compared to GCC 4.4.
> > use a udelay(10) to ensure we have a predictable delay.
> > use an emperical number - 100000 uSec ~= 1sec for a worst case timeout.
> 
> Hm... 100000 usec = 0.1 sec only... Guess you mean
> 
> 100,000 x 10 usec = 1 sec ?
> 
> 
> Best regards,
> 
> Wolfgang Denk
>

[..snip..]
[Menon, Nishanth] - overall, at least the segments I saw had no reason to hit the registers so hard (alright we dont have much else to do.. but still).. I am very open to options from Sukumar(original author) as well..

[Ghorai] I am agreeing with the part where it's looks while(1) loop. And can add retry counter too. otherwise I feel I will increase the boot time.