[U-Boot] [RFCv2 1/3] omap3evm: Reorder related config options

Sanjeev Premi premi at ti.com
Fri Oct 29 18:05:43 CEST 2010


This patch brings related config options together.
Some formatting changes were also done for consistent
look-n-feel after the movement.

The patch doesn't make/include any other functional
change.

Signed-off-by: Sanjeev Premi <premi at ti.com>
---
 include/configs/omap3_evm.h |  404 ++++++++++++++++++++++---------------------
 1 files changed, 210 insertions(+), 194 deletions(-)

diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index e925f3b..0cb12db 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -34,47 +34,79 @@
 #define __CONFIG_H
 
 /*
- * High Level Configuration Options
+ * High level configuration options
  */
 #define CONFIG_ARMV7		1	/* This is an ARM V7 CPU core */
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3430		1	/* which is in a 3430 */
 #define CONFIG_OMAP3_EVM	1	/* working with EVM */
+#define CONFIG_SDRC		1	/* chip has SDRC controller */
+#define CONFIG_OMAP3_MICRON_DDR	1
+#define CONFIG_TWL4030_POWER	1
 
-#define CONFIG_SDRC	/* The chip has SDRC controller */
-
-#include <asm/arch/cpu.h>	/* get chip and board defs */
+#include <asm/arch/cpu.h>		/* get chip and board defs */
 #include <asm/arch/omap3.h>
 
+#undef CONFIG_USE_IRQ			/* no support for IRQs */
+
 /*
- * Display CPU and Board information
+ * Clock related definitions
  */
-#define CONFIG_DISPLAY_CPUINFO		1
-#define CONFIG_DISPLAY_BOARDINFO	1
-
-/* Clock Defines */
 #define V_OSCK			26000000	/* Clock output from T2 */
 #define V_SCLK			(V_OSCK >> 1)
 
-#undef CONFIG_USE_IRQ			/* no support for IRQs */
-#define CONFIG_MISC_INIT_R
-
-#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS	1
-#define CONFIG_INITRD_TAG		1
-#define CONFIG_REVISION_TAG		1
+/*
+ * OMAP3 has 12 GP timers, they can be driven by the system clock
+ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
+ * This rate is divided by a local divisor.
+ */
+#define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
+#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
+#define CONFIG_SYS_HZ			1000
 
 /*
  * Size of malloc() pool
  */
 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
-						/* Sector */
+							/* Sector */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))
+#define CONFIG_SYS_GBL_DATA_SIZE	128	/* bytes reserved for */
 						/* initial data */
 /*
- * Hardware drivers
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128 << 10)	/* regular stack 128 KiB */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ	(4 << 10)	/* IRQ stack 4 KiB */
+#define CONFIG_STACKSIZE_FIQ	(4 << 10)	/* FIQ stack 4 KiB */
+#endif
+
+/*
+ * Physical Memory Map
+ * Note 1: CS1 may or may not be populated
+ * Note 2: SDRAM size is expected to be at least 32MB
+ */
+#define CONFIG_NR_DRAM_BANKS		2
+#define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0
+#define PHYS_SDRAM_1_SIZE		(32 << 20)
+#define PHYS_SDRAM_2			OMAP34XX_SDRC_CS1
+
+/* Limits for memtest */
+#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
+#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
+						0x01F00000) /* 31MB */
+/*
+ * SDRAM Bank Allocation method
  */
+#define SDRC_R_B_C			1
+
+/*
+ * Default load address
+ */
+#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)
 
 /*
  * NS16550 Configuration
@@ -90,23 +122,112 @@
  * select serial console configuration
  */
 #define CONFIG_CONS_INDEX		1
-#define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
 #define CONFIG_SERIAL1			1	/* UART1 on OMAP3 EVM */
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
 					115200}
+
+/*
+ * Size of Console IO Buffer
+ */
+#define CONFIG_SYS_CBSIZE		256
+
+/*
+ * Size of print buffer
+ */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+						sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/*
+ * Size of bootarg buffer
+ */
+#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
+
+/*
+ * I2C
+ */
+#define CONFIG_HARD_I2C			1
+#define CONFIG_SYS_I2C_SPEED		100000
+#define CONFIG_SYS_I2C_SLAVE		1
+#define CONFIG_SYS_I2C_BUS		0
+#define CONFIG_SYS_I2C_BUS_SELECT	1
+#define CONFIG_DRIVER_OMAP34XX_I2C	1
+
+/*
+ * PISMO support
+ */
+#define PISMO1_NAND_SIZE		GPMC_SIZE_128M
+#define PISMO1_ONEN_SIZE		GPMC_SIZE_128M
+
+/* Max number of sectors on one chip */
+#define CONFIG_SYS_MAX_FLASH_SECT	520
+
+/* Max number of flash banks */
+#define CONFIG_SYS_MAX_FLASH_BANKS	2
+
+#define CONFIG_SYS_FLASH_BASE		boot_flash_base
+
+/* Monitor at start of flash */
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
+#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
+
+#define CONFIG_SYS_ENV_SECT_SIZE	boot_flash_sec
+#define CONFIG_ENV_OFFSET		boot_flash_off
+#define CONFIG_ENV_ADDR			boot_flash_env_addr
+
+/*
+ * Start location of environment
+ */
+#define ONENAND_ENV_OFFSET		0x260000
+#define SMNAND_ENV_OFFSET		0x260000
+
+/*
+ * NAND
+ */
+/* Physical address to access NAND */
+#define CONFIG_SYS_NAND_ADDR		NAND_BASE
+
+/* Physical address to access NAND at CS0 */
+#define CONFIG_SYS_NAND_BASE		NAND_BASE
+
+/* Max number of NAND devices */
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+
+/* Timeout values (in ticks) */
+#define CONFIG_SYS_FLASH_ERASE_TOUT	(100 * CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_WRITE_TOUT	(100 * CONFIG_SYS_HZ)
+
+/* Flash banks JFFS2 should use */
+#define CONFIG_SYS_MAX_MTD_BANKS	(CONFIG_SYS_MAX_FLASH_BANKS + \
+						CONFIG_SYS_MAX_NAND_DEVICE)
+
+#define CONFIG_SYS_JFFS2_MEM_NAND
+#define CONFIG_SYS_JFFS2_FIRST_BANK	CONFIG_SYS_MAX_FLASH_BANKS
+#define CONFIG_SYS_JFFS2_NUM_BANKS	1
+
+#define CONFIG_JFFS2_NAND
+/* nand device jffs2 lives on */
+#define CONFIG_JFFS2_DEV		"nand0"
+/* Start of jffs2 partition */
+#define CONFIG_JFFS2_PART_OFFSET	0x680000
+/* Size of jffs2 partition */
+#define CONFIG_JFFS2_PART_SIZE		0xf980000
+
+#define CONFIG_SYS_NO_FLASH
+
+/*
+ * MMC
+ */
 #define CONFIG_MMC			1
 #define CONFIG_OMAP3_MMC		1
 #define CONFIG_DOS_PARTITION		1
 
-/* DDR - I use Micron DDR */
-#define CONFIG_OMAP3_MICRON_DDR		1
-
-/* USB
- * Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard
+/*
+ * USB
+ *
+ * Enable CONFIG_MUSB_HCD for Host functionalities e.g. MSC, keyboard
  * Enable CONFIG_MUSB_UDD for Device functionalities.
  */
 #define CONFIG_USB_OMAP3		1
@@ -124,7 +245,7 @@
 
 #ifdef CONFIG_USB_KEYBOARD
 #define CONFIG_SYS_USB_EVENT_POLL
-#define CONFIG_PREBOOT "usb start"
+#define CONFIG_PREBOOT			"usb start"
 #endif /* CONFIG_USB_KEYBOARD */
 
 #endif /* CONFIG_MUSB_HCD */
@@ -143,7 +264,39 @@
 
 #endif /* CONFIG_USB_OMAP3 */
 
-/* commands to include */
+#ifndef __ASSEMBLY__
+extern unsigned int boot_flash_base;
+extern volatile unsigned int boot_flash_env_addr;
+extern unsigned int boot_flash_off;
+extern unsigned int boot_flash_sec;
+extern unsigned int boot_flash_type;
+#endif
+
+/*
+ * U-boot features
+ */
+#define CONFIG_SYS_LONGHELP		1
+#define CONFIG_SYS_HUSH_PARSER		1
+#define CONFIG_SYS_PROMPT		"OMAP3_EVM # "
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#define CONFIG_SYS_MAXARGS		16	/* max args for a command */
+
+#define CONFIG_DISPLAY_CPUINFO		1
+#define CONFIG_DISPLAY_BOARDINFO	1
+
+#define CONFIG_MISC_INIT_R		1
+
+#define CONFIG_ENV_OVERWRITE		1
+#define CONFIG_AUTO_COMPLETE		1
+
+#define CONFIG_CMDLINE_TAG		1
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_INITRD_TAG		1
+#define CONFIG_REVISION_TAG		1
+
+/*
+ * Common commands
+ */
 #include <config_cmd_default.h>
 
 #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
@@ -161,41 +314,39 @@
 #undef CONFIG_CMD_IMI		/* iminfo			*/
 #undef CONFIG_CMD_IMLS		/* List all found images	*/
 
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_HARD_I2C			1
-#define CONFIG_SYS_I2C_SPEED		100000
-#define CONFIG_SYS_I2C_SLAVE		1
-#define CONFIG_SYS_I2C_BUS		0
-#define CONFIG_SYS_I2C_BUS_SELECT	1
-#define CONFIG_DRIVER_OMAP34XX_I2C	1
-
 /*
- * TWL4030
+ * Additional definitions that depend on chosen commands
  */
-#define CONFIG_TWL4030_POWER		1
+/* NAND */
+#if defined(CONFIG_CMD_NAND)
+#define CONFIG_NAND_OMAP_GPMC
+#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
+#define CONFIG_ENV_IS_IN_NAND
+#elif defined(CONFIG_CMD_ONENAND)
+#define CONFIG_ENV_IS_IN_ONENAND	1
+#endif
 
-/*
- * Board NAND Info.
- */
-#define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
-							/* to access nand */
-#define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
-							/* to access */
-							/* nand at CS0 */
-
-#define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of */
-							/* NAND devices */
-#define CONFIG_JFFS2_NAND
-/* nand device jffs2 lives on */
-#define CONFIG_JFFS2_DEV		"nand0"
-/* start of jffs2 partition */
-#define CONFIG_JFFS2_PART_OFFSET	0x680000
-#define CONFIG_JFFS2_PART_SIZE		0xf980000	/* sz of jffs2 part */
+/* Ethernet (SMSC9115 from SMSC9118 family) */
+#if defined(CONFIG_CMD_NET)
+
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC911X
+#define CONFIG_SMC911X_32_BIT
+#define CONFIG_SMC911X_BASE		0x2C000000
+
+/* BOOTP fields */
+#define CONFIG_BOOTP_SUBNETMASK		0x00000001
+#define CONFIG_BOOTP_GATEWAY		0x00000002
+#define CONFIG_BOOTP_HOSTNAME		0x00000004
+#define CONFIG_BOOTP_BOOTPATH		0x00000010
 
-/* Environment information */
-#define CONFIG_BOOTDELAY	10
+#endif /* (CONFIG_CMD_NET) */
 
-#define CONFIG_BOOTFILE		uImage
+/*
+ * Environment and boot command
+ */
+#define CONFIG_BOOTDELAY		10
+#define CONFIG_BOOTFILE			uImage
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"loadaddr=0x82000000\0" \
@@ -231,139 +382,4 @@
 		"fi; " \
 	"else run nandboot; fi"
 
-#define CONFIG_AUTO_COMPLETE	1
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP		/* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#define CONFIG_SYS_PROMPT		"OMAP3_EVM # "
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
-					sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS		16	/* max number of command */
-						/* args */
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
-/* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
-					0x01F00000) /* 31MB */
-
-#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
-								/* address */
-
-/*
- * OMAP3 has 12 GP timers, they can be driven by the system clock
- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
- * This rate is divided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
-#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ			1000
-
-/*-----------------------------------------------------------------------
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE	(128 << 10)	/* regular stack 128 KiB */
-#ifdef CONFIG_USE_IRQ
-#define CONFIG_STACKSIZE_IRQ	(4 << 10)	/* IRQ stack 4 KiB */
-#define CONFIG_STACKSIZE_FIQ	(4 << 10)	/* FIQ stack 4 KiB */
-#endif
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
-#define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE	(32 << 20)	/* at least 32 MiB */
-#define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
-
-/* SDRAM Bank Allocation method */
-#define SDRC_R_B_C		1
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-
-/* **** PISMO SUPPORT *** */
-
-/* Configure the PISMO */
-#define PISMO1_NAND_SIZE		GPMC_SIZE_128M
-#define PISMO1_ONEN_SIZE		GPMC_SIZE_128M
-
-#define CONFIG_SYS_MAX_FLASH_SECT	520	/* max number of sectors */
-						/* on one chip */
-#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of flash banks */
-#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
-
-#define CONFIG_SYS_FLASH_BASE		boot_flash_base
-
-/* Monitor at start of flash */
-#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
-
-#if defined(CONFIG_CMD_NAND)
-#define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
-#define CONFIG_ENV_IS_IN_NAND
-#elif defined(CONFIG_CMD_ONENAND)
-#define CONFIG_ENV_IS_IN_ONENAND	1
-#endif
-#define ONENAND_ENV_OFFSET		0x260000 /* environment starts here */
-#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
-
-#define CONFIG_SYS_ENV_SECT_SIZE	boot_flash_sec
-#define CONFIG_ENV_OFFSET		boot_flash_off
-#define CONFIG_ENV_ADDR			boot_flash_env_addr
-
-/*-----------------------------------------------------------------------
- * CFI FLASH driver setup
- */
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	(100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT	(100 * CONFIG_SYS_HZ)
-
-/* Flash banks JFFS2 should use */
-#define CONFIG_SYS_MAX_MTD_BANKS	(CONFIG_SYS_MAX_FLASH_BANKS + \
-					CONFIG_SYS_MAX_NAND_DEVICE)
-#define CONFIG_SYS_JFFS2_MEM_NAND
-/* use flash_info[2] */
-#define CONFIG_SYS_JFFS2_FIRST_BANK	CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_NUM_BANKS	1
-
-#ifndef __ASSEMBLY__
-extern unsigned int boot_flash_base;
-extern volatile unsigned int boot_flash_env_addr;
-extern unsigned int boot_flash_off;
-extern unsigned int boot_flash_sec;
-extern unsigned int boot_flash_type;
-#endif
-
-/*----------------------------------------------------------------------------
- * SMSC9115 Ethernet from SMSC9118 family
- *----------------------------------------------------------------------------
- */
-#if defined(CONFIG_CMD_NET)
-
-#define CONFIG_NET_MULTI
-#define CONFIG_SMC911X
-#define CONFIG_SMC911X_32_BIT
-#define CONFIG_SMC911X_BASE	0x2C000000
-
-#endif /* (CONFIG_CMD_NET) */
-
-/*
- * BOOTP fields
- */
-
-#define CONFIG_BOOTP_SUBNETMASK		0x00000001
-#define CONFIG_BOOTP_GATEWAY		0x00000002
-#define CONFIG_BOOTP_HOSTNAME		0x00000004
-#define CONFIG_BOOTP_BOOTPATH		0x00000010
-
 #endif /* __CONFIG_H */
-- 
1.7.2.2



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