[U-Boot] [PATCH v1 2/2] APM82xxx: Add bluestone board support

Stefan Roese sr at denx.de
Wed Sep 1 09:31:49 CEST 2010


Hi Marri,

On Wednesday 01 September 2010 04:11:22 tmarri at apm.com wrote:
> From: Tirumala Marri <tmarri at apm.com>
> 
> Add support code for bluestone board wth APM82XXX processor based.
> This patch includes early board init, misc init, configure EBC,
> initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Please find some further comments below.
 
> Signed-off-by: Tirumala R Marri <tmarri at apm.com>
> ---
>  V1:
>   * Remove "All rights reserved" phrase from headers.
>   * Add empty line which was removed.
>   * Move EBC definititions to bluestone_config.h file
>   * Remove reconfigure_EBC() function.
>   * Remove unused CONFIG_SDRAM16BIT_OFFSET.
>   * Remove unused CONFIG_SDRAM_INFO_EEPROM_ADDR.
>   * Add empty lines in bluestone.c file.
>   * Replacing AC_R | AC_W | AC_X with AC_RWX.
>   * Remove changes to main Makefile
>   * Remove NAND references from config file.
>   * Squash some of the patches.
>   * Remove top Makefile change.
> ---
>  MAINTAINERS                      |    3 +
>  MAKEALL                          |    1 +
>  board/amcc/bluestone/Makefile    |   52 +++++++++++
>  board/amcc/bluestone/bluestone.c |  162
> +++++++++++++++++++++++++++++++++++ board/amcc/bluestone/config.mk   |  
> 40 +++++++++
>  board/amcc/bluestone/init.S      |   55 ++++++++++++
>  boards.cfg                       |    1 +
>  include/configs/bluestone.h      |  175
> ++++++++++++++++++++++++++++++++++++++ 8 files changed, 489 insertions(+),
> 0 deletions(-)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4b91b0f..263c00b 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -253,6 +253,9 @@ Feng Kan <fkan at amcc.com>
> 
>  	redwood			PPC4xx
> 
> +Tirumala Marri<tmarri at apm.com>

Missing space before "<".

> +	bluestone	APM82XXX
> +
>  Brad Kemp <Brad.Kemp at seranoa.com>
> 
>  	ppmc8260	MPC8260
> diff --git a/MAKEALL b/MAKEALL
> index b34ae33..02d5c17 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -191,6 +191,7 @@ LIST_4xx="		\
>  	ASH405		\
>  	bamboo		\
>  	bamboo_nand	\
> +	bluestone	\
>  	bubinga		\
>  	CANBT		\
>  	canyonlands	\
> diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
> new file mode 100644
> index 0000000..41751c8
> --- /dev/null
> +++ b/board/amcc/bluestone/Makefile
> @@ -0,0 +1,52 @@
> +#
> +# Copyright (c) 2010, Applied Micro Circuits Corporation
> +# Author: Tirumala R Marri <tmarri at apm.com>
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB	= $(obj)lib$(BOARD).a
> +
> +COBJS-y	:= $(BOARD).o
> +SOBJS	:= init.o
> +
> +COBJS   := $(COBJS-y)
> +SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS	:= $(addprefix $(obj),$(COBJS))
> +SOBJS	:= $(addprefix $(obj),$(SOBJS))
> +
> +$(LIB):	$(OBJS) $(SOBJS)
> +	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
> +
> +clean:
> +	rm -f $(SOBJS) $(OBJS)
> +
> +distclean:	clean
> +	rm -f $(LIB) core *.bak $(obj).depend
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/amcc/bluestone/bluestone.c
> b/board/amcc/bluestone/bluestone.c new file mode 100644
> index 0000000..fbb70e3
> --- /dev/null
> +++ b/board/amcc/bluestone/bluestone.c
> @@ -0,0 +1,162 @@
> +/*
> + * Bluestone board support
> + *
> + * Copyright (c) 2010, Applied Micro Circuits Corporation
> + * Author: Tirumala R Marri <tmarri at apm.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <ppc440.h>
> +#include <libfdt.h>
> +#include <fdt_support.h>
> +#include <i2c.h>
> +#include <asm/processor.h>
> +#include <asm/io.h>
> +#include <asm/mmu.h>
> +#include <asm/gpio.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;

Is the "gd" struct used in this file? If not, please remove.

> +#define SDR_AHB_CFG	0x370

Not used. Please remove.

> +/* Define Boot devices */
> +#define BOOT_FROM_8BIT_SRAM                     0x00
> +#define BOOT_FROM_8BIT_SRAM_FULL_ADDR           0x01
> +#define BOOT_FROM_8BIT_NAND			0x02
> +#define BOOT_FROM_8BIT_NOR			0x03
> +#define BOOT_FROM_8BIT_NOR_FULL_ADDR		0x04
> +#define BOOT_DEVICE_UNKNOWN			0xff

Are these defines board or SoC specific? If SoC, then please move to header.

> +#define APM82161_MASK		(u32)(0x1 << 21)

Not used. Please remove.

> +/*
> + * Get bootdevice information and
> + * setup EBC configuration
> + * NOTE: Assume that I2C had been initialized
> + */
> +int bootdevice_selected(void)
> +{
> +	unsigned long rl;
> +	unsigned long bootstrap_settings;
> +	int computed_boot_device = BOOT_DEVICE_UNKNOWN;
> +
> +	mfsdr(SDR0_SDSTP1, bootstrap_settings);
> +	rl = SDR_SDSTP1_RL_DECODE(bootstrap_settings);
> +	if (rl == SDR_SDSTP1_RL_EBC) /* Boot device is NOR */
> +		computed_boot_device = BOOT_FROM_8BIT_NOR;
> +	else if (rl == SDR_SDSTP1_RL_NDFC)
> +		computed_boot_device = BOOT_FROM_8BIT_NAND;
> +	return computed_boot_device;
> +}
> +
> +int board_early_init_f(void)
> +{
> +	/*
> +	 * Setup the interrupt controller polarities, triggers, etc.
> +	 */
> +	mtdcr(UIC0SR, 0xffffffff);	/* clear all */
> +	mtdcr(UIC0ER, 0x00000000);	/* disable all */
> +	mtdcr(UIC0CR, 0x00000005);	/* ATI & UIC1 crit are critical */
> +	mtdcr(UIC0PR, 0xffffffff);	/* per ref-board manual */
> +	mtdcr(UIC0TR, 0x00000000);	/* per ref-board manual */
> +	mtdcr(UIC0VR, 0x00000000);	/* int31 highest, base=0x000 */
> +	mtdcr(UIC0SR, 0xffffffff);	/* clear all */
> +
> +	mtdcr(UIC1SR, 0xffffffff);	/* clear all */
> +	mtdcr(UIC1ER, 0x00000000);	/* disable all */
> +	mtdcr(UIC1CR, 0x00000000);	/* all non-critical */
> +	mtdcr(UIC1PR, 0xffffffff);	/* per ref-board manual */
> +	mtdcr(UIC1TR, 0x00000000);	/* per ref-board manual */
> +	mtdcr(UIC1VR, 0x00000000);	/* int31 highest, base=0x000 */
> +	mtdcr(UIC1SR, 0xffffffff);	/* clear all */
> +
> +	mtdcr(UIC2SR, 0xffffffff);	/* clear all */
> +	mtdcr(UIC2ER, 0x00000000);	/* disable all */
> +	mtdcr(UIC2CR, 0x00000000);	/* all non-critical */
> +	mtdcr(UIC2PR, 0xffffffff);	/* per ref-board manual */
> +	mtdcr(UIC2TR, 0x00000000);	/* per ref-board manual */
> +	mtdcr(UIC2VR, 0x00000000);	/* int31 highest, base=0x000 */
> +	mtdcr(UIC2SR, 0xffffffff);	/* clear all */
> +
> +	mtdcr(UIC3SR, 0xffffffff);	/* clear all */
> +	mtdcr(UIC3ER, 0x00000000);	/* disable all */
> +	mtdcr(UIC3CR, 0x00000000);	/* all non-critical */
> +	mtdcr(UIC3PR, 0xffffffff);	/* per ref-board manual */
> +	mtdcr(UIC3TR, 0x00000000);	/* per ref-board manual */
> +	mtdcr(UIC3VR, 0x00000000);	/* int31 highest, base=0x000 */
> +	mtdcr(UIC3SR, 0xffffffff);	/* clear all */
> +
> +	/*
> +	 * Configure PFC (Pin Function Control) registers
> +	 * UART0: 2 pins
> +	 */
> +	mtsdr(SDR0_PFC1, 0x0000000);
> +
> +	return 0;
> +}
> +
> +int checkboard(void)
> +{
> +	char *s = getenv("serial#");
> +
> +	printf("Board: Bluestone Evaluation Board");
> +
> +	if (s != NULL) {
> +		puts(", serial# ");
> +		puts(s);
> +	}
> +	putc('\n');
> +
> +	return 0;
> +}
> +
> +int board_early_init_r(void)
> +{
> +	u32 bootdevice;
> +
> +	/*
> +	 * Clear potential errors resulting from auto-calibration.
> +	 * If not done, then we could get an interrupt later on when
> +	 * exceptions are enabled.
> +	 */
> +	set_mcsr(get_mcsr());

Are you sure that this is really needed here? IIRC, then the DDR2 init code 
already takes care of this. Please re-check.

> +	/* Reconfigure EBC here */
> +	bootdevice = bootdevice_selected();

So you're calling this function to detect the bootdevice. But nothing happens 
with this result. Can't this be removed completely?

> +	return 0;
> +}
> +
> +int misc_init_r(void)
> +{
> +	u32 sdr0_srst1 = 0;
> +
> +	/* Setup PLB4-AHB bridge based on the system address map */
> +	mtdcr(AHB_TOP, 0x8000004B);
> +	mtdcr(AHB_BOT, 0x8000004B);
> +
> +	/*
> +	 * The AHB Bridge core is held in reset after power-on or reset
> +	 * so enable it now
> +	 */
> +	mfsdr(SDR0_SRST1, sdr0_srst1);
> +	sdr0_srst1 &= ~SDR0_SRST1_AHB;
> +	mtsdr(SDR0_SRST1, sdr0_srst1);
> +
> +	return 0;
> +}
> diff --git a/board/amcc/bluestone/config.mk
> b/board/amcc/bluestone/config.mk new file mode 100644
> index 0000000..13cd6c0
> --- /dev/null
> +++ b/board/amcc/bluestone/config.mk
> @@ -0,0 +1,40 @@
> +#
> +# Copyright (c) 2010, Applied Micro Circuits Corporation
> +# Author: Tirumala R Marri <tmarri at apm.com>
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +# Applied Micro APM82XXX Evaluation board.
> +#
> +
> +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
> +
> +ifndef TEXT_BASE
> +TEXT_BASE = 0xFFFA0000
> +endif
> +
> +PLATFORM_CPPFLAGS += -DCONFIG_440=1
> +
> +ifeq ($(debug),1)
> +PLATFORM_CPPFLAGS += -DDEBUG
> +endif
> +
> +ifeq ($(dbcr),1)
> +PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff0000
> +endif
> diff --git a/board/amcc/bluestone/init.S b/board/amcc/bluestone/init.S
> new file mode 100644
> index 0000000..528de19
> --- /dev/null
> +++ b/board/amcc/bluestone/init.S
> @@ -0,0 +1,55 @@
> +/*
> + * Copyright (c) 2010, Applied Micro Circuits Corporation
> + * Author: Tirumala R Marri <tmarri at apm.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <ppc_asm.tmpl>
> +#include <config.h>
> +#include <asm/mmu.h>
> +
> +/*************************************************************************
> * + * TLB TABLE
> + *
> + * This table is used by the cpu boot code to setup the initial tlb
> + * entries. Rather than make broad assumptions in the cpu source tree,
> + * this table lets each board set things up however they like.
> + *
> + *  Pointer to the table is returned in r1
> + *
> +
> *************************************************************************/
> +	.section .bootpg,"ax"
> +	.globl tlbtab
> +
> +tlbtab:
> +	tlbtab_start
> +
> +	/* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
> +	tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR,
> +			0, AC_RWX|SA_G)

Spaces around "|". Also below.

> +
> +	/* TLB-entry for OCM */
> +	tlbentry(CONFIG_SYS_OCM_BASE, SZ_64K, 0x00040000, 4,
> +			AC_RWX|SA_I)
> +
> +	/* TLB-entry for Local Configuration registers => peripherals */
> +	tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_16K,
> +			CONFIG_SYS_PERIPHERAL_BASE, 4, AC_RWX|SA_IG)
> +	tlbtab_end
> diff --git a/boards.cfg b/boards.cfg
> index 69c6897..48001d3 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -196,6 +196,7 @@ redwood		powerpc	ppc4xx		-		
amcc
>  taihu		powerpc	ppc4xx		-		amcc
>  taishan		powerpc	ppc4xx		-		amcc
>  yucca		powerpc	ppc4xx		-		amcc
> +bluestone 	powerpc ppc4xx		-		amcc
>  AP1000		powerpc	ppc4xx		ap1000		amirix
>  CRAYL1		powerpc	ppc4xx		L1		cray
>  ADCIOP		powerpc	ppc4xx		adciop		esd
> diff --git a/include/configs/bluestone.h b/include/configs/bluestone.h
> new file mode 100644
> index 0000000..8ee5f94
> --- /dev/null
> +++ b/include/configs/bluestone.h
> @@ -0,0 +1,175 @@
> +/*
> + * bluestone.h - configuration for Blouestone (APM82XXX)
> + *
> + * Copyright (c) 2010, Applied Micro Circuits Corporation
> + * Author: Tirumala R Marri <tmarri at apm.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/*
> + * High Level Configuration Options
> + */
> +#define CONFIG_APM82181		1	/* Specific APM82XXX  */
> +#define CONFIG_APM82XXX		1	/* APM82XXX series    */
> +#define CONFIG_HOSTNAME		bluestone
> +
> +#define CONFIG_440		1
> +#define CONFIG_4xx		1	/* ... PPC4xx family */
> +
> +/*
> + * Include common defines/options for all AMCC eval boards
> + */
> +#include "amcc-common.h"
> +#define CONFIG_SYS_CLK_FREQ	50000000
> +
> +#define CONFIG_BOARD_TYPES		1	/* support board types */
> +#define CONFIG_BOARD_EARLY_INIT_F	1       /* Call board_early_init_f */
> +#define CONFIG_BOARD_EARLY_INIT_R	1       /* Call board_early_init_r */
> +#define CONFIG_MISC_INIT_R		1       /* Call misc_init_r */
> +
> +/*
> + * Base addresses -- Note these are effective addresses where the
> + * actual resources get mapped (not physical addresses)
> + */
> +/* EBC stuff */
> +#define CONFIG_SYS_EXTSRAM_BASE		0xE1000000	/* 2MB */

Not used, please remove.

> +/* later mapped to this addr */
> +#define CONFIG_SYS_FLASH_BASE		0xFFF00000
> +#define CONFIG_SYS_FLASH_SIZE		(1 << 20)	/* 1MB usable 
*/

Why is only 1 MiB usable? From the schematics 4 MiB are equipped.

> +
> +/* EBC Boot Space: 0xFF000000 */
> +#define CONFIG_SYS_BOOT_BASE_ADDR	0xFF000000
> +#define CONFIG_SYS_OCM_BASE		0xE3000000 /* OCM: 32k             */
> +#define CONFIG_SYS_SRAM_BASE		0xE8000000 /* SRAM: 256k           */
> +#define CONFIG_SYS_PERIPHERAL_BASE	0xEF600000 /* internal peripherals */
> +#define CONFIG_SYS_AHB_BASE		0xE2000000 /* internal AHB 
peripherals*/
> +
> +/*
> + * Initial RAM & stack pointer (placed in OCM)
> + */
> +#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_BASE	/* OCM    */
> +#define CONFIG_SYS_INIT_RAM_END		(4 << 10)
> +#define CONFIG_SYS_GBL_DATA_SIZE	256	/* num bytes initial data */
> +#define CONFIG_SYS_GBL_DATA_OFFSET	\
> +	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
> +#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
> +
> +/*
> + * Environment
> + */
> +/*
> + * Define here the location of the environment variables (FLASH).
> + */
> +#define	CONFIG_ENV_IS_IN_FLASH	1	/* use FLASH for environment 
vars */
> +#define CONFIG_SYS_NOR_CS	0	/* NOR chip connected to CSx */
> +
> +/*
> + * FLASH related
> + */
> +#define CONFIG_SYS_FLASH_CFI	/* The flash is CFI compatible  */
> +#define CONFIG_FLASH_CFI_DRIVER	/* Use common CFI driver        */
> +#define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
> +/* Reduce the actual size of the flash */
> +#define CONFIG_SIZE_REDUCE		(3 << 20)
> +/* Reduce the actual sectors of the flash */
> +#define CONFIG_SECTOR_REDUCE		48

Those xxx_REDUCE macros are not referenced anywhere. What's the reasoning 
behind them? Please remove.

> +#define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE}
> +/* max number of memory banks           */
> +#define CONFIG_SYS_MAX_FLASH_BANKS	1
> +/* max number of sectors on one chip    */
> +#define CONFIG_SYS_MAX_FLASH_SECT	80
> +/* Timeout for Flash Erase (in ms)      */
> +#define CONFIG_SYS_FLASH_ERASE_TOUT	120000
> +/* Timeout for Flash Write (in ms)      */
> +#define CONFIG_SYS_FLASH_WRITE_TOUT	500
> +/* use buffered writes (20x faster)     */
> +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
> +/* print 'E' for empty sector on flinfo */
> +#define CONFIG_SYS_FLASH_EMPTY_INFO
> +#ifdef CONFIG_ENV_IS_IN_FLASH
> +#define CONFIG_ENV_SECT_SIZE	0x10000	/* size of one complete sector  */
> +#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - 
CONFIG_ENV_SECT_SIZE)
> +#define	CONFIG_ENV_SIZE		0x4000	/* Total Size of Environment 
Sector   */
> +/* Address and size of Redundant Environment Sector	*/
> +#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR - 
CONFIG_ENV_SECT_SIZE)
> +#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
> +#endif /* CONFIG_ENV_IS_IN_FLASH */
> +
> +/* NOR Flash */
> +#define CONFIG_SYS_EBC_PB0AP 	(EBC_BXAP_BME_DISABLED   | \
> +				EBC_BXAP_TWT_ENCODE(64)  | \
> +				EBC_BXAP_BCE_DISABLE    | \
> +				EBC_BXAP_BCT_2TRANS     | \
> +				EBC_BXAP_CSN_ENCODE(1)  | \
> +				EBC_BXAP_OEN_ENCODE(2)  | \
> +				EBC_BXAP_WBN_ENCODE(2)  | \
> +				EBC_BXAP_WBF_ENCODE(2)  | \
> +				EBC_BXAP_TH_ENCODE(7)   | \
> +				EBC_BXAP_SOR_DELAYED    | \
> +				EBC_BXAP_BEM_WRITEONLY  | \
> +				EBC_BXAP_PEN_DISABLED)
> +/* Peripheral Bank Configuration Register - EBC_BxCR */
> +#define CONFIG_SYS_EBC_PB0CR	\
> +			(EBC_BXCR_BAS_ENCODE(CONFIG_SYS_FLASH_BASE) | \
> +			EBC_BXCR_BS_1MB                | \
> +			EBC_BXCR_BU_RW                  | \
> +			EBC_BXCR_BW_8BIT)
> +
> +/* SDRAM */
> +#define CONFIG_SPD_EEPROM       1       /* Use SPD EEPROM for setup     */
> +#define SPD_EEPROM_ADDRESS	{0x53, 0x51}	/* SPD i2c spd addresses */
> +#define CONFIG_PPC4xx_DDR_AUTOCALIBRATION       /* IBM DDR autocalibration
> */ +#define CONFIG_AUTOCALIB      "silent\0"	/* default is non-verbose   
> */ +#define CONFIG_DDR_ECC		1	/* with ECC support             
*/

Please remove dead code. You might want to enable ECC support though. It 
shouldn't "hurt" if non-ECC DIMM's are plugged.

> +/*
> + * I2C
> + */
> +#define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed            */
> +
> +#define CONFIG_SYS_I2C_MULTI_EEPROMS
> +#define CONFIG_SYS_I2C_EEPROM_ADDR		(0xa8>>1)

Spaces around ">>".

> +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
> +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
> +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5	/* Data sheet 
*/
> +/* I2C bootstrap EEPROM */
> +#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR	0x52
> +#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET	0
> +#define CONFIG_4xx_CONFIG_BLOCKSIZE		16
> +/*
> + * Ethernet
> + */
> +#define CONFIG_IBM_EMAC4_V4    1
> +#define CONFIG_EMAC_PHY_MODE  EMAC_PHY_MODE_NONE_RGMII
> +#define CONFIG_HAS_ETH0
> +#define CONFIG_M88E1111_PHY

Are you sure here? From the schematics, its a different PHY.

> +/* PHY address, See schematics  */
> +#define CONFIG_PHY_ADDR			0x1f
> +/* reset phy upon startup       */
> +#define CONFIG_PHY_RESET		1
> +#define CONFIG_PHY_RESET_R

Remove.

> +/* Include GbE speed/duplex detection */
> +#define CONFIG_PHY_GIGE			1
> +#define CONFIG_PHY_DYNAMIC_ANEG		1
> +/*
> + * External Bus Controller (EBC) Setup
> + **/
> +#define CONFIG_SYS_EBC_CFG		0xB8400000	/*  EBC0_CFG */
> +
> +#endif /* __CONFIG_H */

Cheers,
Stefan

--
DENX Software Engineering GmbH,      MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de


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