[U-Boot] [PATCH 1/3] mmc: limit block count for multi-block write commands

[Wolfgang Denk]

Dear Lei Wen,

In message <AANLkTimNiu6U4XQJU=s71A15oQXOt071O5wdfXx-ehtg at mail.gmail.com> you wrote:
> 
> You says that the sd spec is just example, and mention the mmc.
> But you should not forget mmc&sd card are often designed together, so
> designer would
> choose the sd register layout to get the sd&mmc both works.
> 
> If designer don't follow the spec, it is obvious allowable, but this
> one just should be a special case.
> I believe most others would like to follow the spec directly.

As Reinhard pointed out, the document you quoted is the SD Host
Controller Simplified Specification, but we are talking about MMC code
here, which is a bit more generic. SD Host Controller limitations
should be handled in the SD Host Controller driver code, not in the
MMC generic code.


> >> For the 524288 magic number, 512k, I just follow the Linux way, that
> >> is don't let the driver to bother to handle the dma boundary if it use
> >> sdma instead PIO.
> >
> > And again: I am sure most hardware does not have a funny 512k boundary for
> > DMA operations either. And if, would that boundary not be at a divisible
> > by 512k memory address (page size maybe) and not at a length of 512k?

You did not reply to this argument. Are you really sure the
limitation is on the transfer size?

Best regards,

Wolfgang Denk

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