[U-Boot] [PATCH 00/26 v2][NEXT] arm: add full relocation / cache support

Ben Gardiner bengardiner at nanometrics.ca
Wed Sep 22 19:51:18 CEST 2010


On Fri, Sep 17, 2010 at 7:10 AM, Heiko Schocher <hs at denx.de> wrote:
> This patch series add full relocation and cache support for arm
> based boards. I test this for arm1136, arm_cortexa8 and arm926ejs
> based boards.
>
> Relocation support:
>
> !! This change is not compatible to old code !!
>
> If you want to compile in old style, you can set
>
> CONFIG_SYS_ARM_WITHOUT_RELOC
>
> but this possibility will be removed soon, so please
> adapt your board(s)
>
> changed arch/arm/lib/board.c to get inline with arch/powerpc/lib/board.c
> maybe it is possible to snyc them to one arch/generic/lib/board.c?
>
> This approach is similiar to powerpc, so there is a need for
> an initial stack pointer addr defined through CONFIG_SYS_INIT_SP_ADDR.
>
> Please also read doc/README.arm-relocation There is more
> info what is done, and maybe should be done.
>
> Cache support:
>
> I used the patches from Alessandro Rubini:
> http://lists.denx.de/pipermail/u-boot/2010-January/067099.html
>
> and rebased them to actual code. Also, in case of full relocation,
> the position of the TLB can not be set on compile time, instead
> it is calculated in board_init_f() and stored in gd. Also added
> cache support for arm_cortexa8 and arm1136.
>
> changes since v1:
>
> - missed to add statistics for enabling dcache to arm926ejs in
>  commit message. Add also CACHE command to the tx25 and
>  magnesium board. So I changed old patch
>  "ARM: flush cache for arm926" to
>  "ARM (ARM926ejs): add data cache support, tested on magnesium and tx25 board"
> - set TEXT_BASE == relocation address for the tx25 board.
>  -> in relocation_code() no need to copy code again for
>  this board. This results in editing "ARM: implement relocation for ARM926"
>  patch.

Tested u-boot/next, where the following is also applied:

97003756249bd790910417eb66f0039bbf06a02c da8xx: fixup ARM relocation support

Tests on da850evm with NAND and MII PHY enabled work fine.

Tested-by: Ben Gardiner <bengardiner at nanometrics.ca>

Best Regards,
Ben Gardiner

---
Nanometrics Inc.
http://www.nanometrics.ca


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