[U-Boot] [PATCH v2] ARM926ejs: Add routines to invalidate D-Cache

[Reinhard Meyer]

Dear Albert, Aneesh, Eric,
> > We have a fundamental problem when it comes to invalidating an
> > un-aligned buffer. Either you flush the boundary lines and corrupt your
> > buffer at boundaries OR you invalidate without flushing and corrupt
> > memory around your buffer. Both are not good! The only real solution is
> > to have aligned buffers, if you want to have D-cache enabled and do DMA
> > at the same time.
> 
> Plus, there should not be *heavy* modifications; DMA engines tend to use 
> essentially two types of memory-resident objects: data buffers and 
> buffer descriptors. There's only a small handful of places in the driver 
> code to look at to find where these objects are allocated and how.
> 
> So I stand by my opinion: since the cache invalidation routine should 
> only be called with cache-aligned objects, there is no requirement to 
> flush the first (resp. last) cache line in case of unaligned start 
> (resp.stop), and I don't want cache operations performed when they are 
> not required.

After considering all issues, any driver that does flush OR invalidate a
cache line that it does not fully "own" is prone to cause problems.

At flushing: some DMA might just have put data into the partial line.
At invalidating: some Software might have put data, but the writeback
had not occured.

So both flush AND invalidate functions should check for this event and
emit a proper warning on the console.

My 2.7 cents...
Reinhard