[U-Boot] [PATCH 1/3] ARM: Clean arch/arm/lib/cache.c

Marek Vasut marek.vasut at gmail.com
Thu Aug 11 06:38:50 CEST 2011


On Thursday, August 11, 2011 04:19:45 AM Hong Xu wrote:
> The default cache operations defined in arch/arm/lib/cache.c
> do not perform any real cache operation, and instead a WARNING
> will be emitted.
> 
> Signed-off-by: Hong Xu <hong.xu at atmel.com>
> Tested-by: Elen Song <elen.song at atmel.com>
> CC: Albert Aribaud <albert.u.boot at aribaud.net>
> CC: Aneesh V <aneesh at ti.com>
> CC: Marek Vasut <marek.vasut at gmail.com>
> CC: Reinhard Meyer <u-boot at emk-elektronik.de>
> CC: Heiko Schocher <hs at denx.de>
> ---
>  arch/arm/lib/cache.c |   55
> ++++++++++++++++++++++++++++--------------------- 1 files changed, 31
> insertions(+), 24 deletions(-)
> 
> diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
> index 92b61a2..6af05ec 100644
> --- a/arch/arm/lib/cache.c
> +++ b/arch/arm/lib/cache.c
> @@ -20,36 +20,43 @@
>   * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>   * MA 02111-1307 USA
>   */
> +#include <linux/compiler.h>
> +#include <common.h>
> 
> -/* for now: just dummy functions to satisfy the linker */
> +#define EMIT_WARNING printf("WARNING: %s - CPU cache operation is not " \
> +"implemented!\n", __func__)

Maybe use debug() ? Or make the emission of warning conditional, somehow I have 
the feeling this will make some people unhappy.

Otherwise looks nice and clean.
> 
> -#include <common.h>
> +/*
> + * Default implementations
> + *
> + * Warn user if CPU code does not implement necessary cache functions
> + */
> +void __weak flush_cache(unsigned long start, unsigned long size)
> +{
> +	EMIT_WARNING;
> +}
> 
> -void  __flush_cache(unsigned long start, unsigned long size)
> +void __weak flush_dcache_all(void)
>  {
> -#if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
> -	void arm1136_cache_flush(void);
> +	EMIT_WARNING;
> +}
> 
> -	arm1136_cache_flush();
> -#endif
> -#ifdef CONFIG_ARM926EJS
> -	/* test and clean, page 2-23 of arm926ejs manual */
> -	asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
> -	/* disable write buffer as well (page 2-22) */
> -	asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
> -#endif
> -	return;
> +void __weak flush_dcache_range(unsigned long start, unsigned long stop)
> +{
> +	EMIT_WARNING;
>  }
> -void  flush_cache(unsigned long start, unsigned long size)
> -	__attribute__((weak, alias("__flush_cache")));
> 
> -/*
> - * Default implementation:
> - * do a range flush for the entire range
> - */
> -void	__flush_dcache_all(void)
> +void __weak invalidate_dcache_range(unsigned long start, unsigned long
> stop) +{
> +	EMIT_WARNING;
> +}
> +
> +void __weak invalidate_dcache_all(void)
> +{
> +	EMIT_WARNING;
> +}
> +
> +void __weak invalidate_icache_all(void)
>  {
> -	flush_cache(0, ~0);
> +	EMIT_WARNING;
>  }
> -void	flush_dcache_all(void)
> -	__attribute__((weak, alias("__flush_dcache_all")));


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