[U-Boot] [PATCH] armv7:cache: D cache line size read method

[Lukasz Majewski]

Hi Anessh,

On Fri, 12 Aug 2011 14:32:52 +0530
Aneesh V <aneesh at ti.com> wrote:

> > +
> > +int get_dcache_line_size(void)
> > +{
> > +	return 0;
> > +}  
> 
> Does memalign() take 0 as input and if so what is the output. The GNU
> C library seems to mandate only that it's a power of 2. But the
> following man page seems to says that "The value of alignment must be
> a power of two and must be greater than or equal  to  the size of a
> word."
> 
> http://www.s-gms.ms.edus.si/cgi-bin/man-cgi?memalign+3C


Documentation is one thing, and I was initially planning to return 8
when the CONFIG_DCACHE_OFF is defined (when dcache is disabled).

But then I've looked in the implementation of this function
(common/dlmalloc.c) and discover, that it's smallest alignment is 8
bytes. When number passed to memalign is smaller than 8, then anyway
the alignment is set to this default value. 

On the other hand I've realized than it is more natural to return 0
than 8, and assumed that this will not harm the current implementation.

For the sake of documentation conformance, the value of 8 shall be
returned in this case.

> 
> Also, you seem to be using get_dcache_line_size() in MMC driver. Is
> this function defined for all platforms. Maybe, you must implement a
> weakly linked default function for all platforms?
> 
> best regards,
> Aneesh

Yes, you are right, now the get_dcache_line_size() is defined in the
arch/arm/cpu/armv7/cache_v7.c, so other boards will be broken.

Next version will use the weakly linked default function.

-- 
Best regards,

Lukasz Majewski

Samsung Poland R&D Center
Platform Group