[U-Boot] [PATCH v3] Add 'sf update' command to do smart SPI flash update
Simon Glass
sjg at chromium.org
Wed Aug 24 00:01:34 CEST 2011
Hi Mike,
On Fri, Aug 19, 2011 at 3:28 PM, Mike Frysinger <vapier at gentoo.org> wrote:
> On Friday, August 19, 2011 17:25:10 Simon Glass wrote:
>> On Fri, Aug 19, 2011 at 3:15 PM, Mike Frysinger wrote:
>> > On Friday, August 19, 2011 15:28:48 Simon Glass wrote:
>> >> This adds a new SPI flash command which only rewrites blocks if the
>> >> contents need to change. This can speed up SPI flash programming when
>> >> much of the data is unchanged from what is already there.
>> >
>> > looks good to me. i'll give it a spin on a board of mine and then push
>> > into my sf branch. i really should write a spi flash simulation so i
>> > could just test this from gdb ...
>>
>> Funny you should say that. I rather badly need a way of testing the
>> higher level U-Boot code (from the commands down to where it calls
>> architecture/driver code). I am drafting up an email to send to the
>> list with some thoughts on the matter.
>
> when i wrote the blackfin system level port of the gnu sim, it was so i could
> do this (and i thought it'd be bad-ass). i often use the gnu sim to do
> initial testing (sometimes down to the driver level) before i get around to
> loading up on actual hardware.
>
> $ bfin-elf-run --env operating --model bf537 ./u-boot
>
>
> U-Boot 2011.06-00375-g23ffb39-dirty (Aug 14 2011 - 16:54:03)
>
> CPU: ADSP bf537-0.2 (Detected Rev: 0.0) (bypass boot)
> Board: ADI BF537 stamp board
> Support: http://blackfin.uclinux.org/
> Clock: VCO: 500 MHz, Core: 500 MHz, System: 125 MHz
> RAM: 64 MiB
> Flash: ## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
> 0 Bytes
> MMC:
> *** Warning - bad CRC, using default environment
>
> In: serial
> Out: serial
> Err: serial
> KGDB: [on serial] ready
> Warning: Generating 'random' MAC address
> Net: bfin_mac
> Hit any key to stop autoboot: 5 0
> bfin> help sf
> sf - SPI flash sub-system
>
> Usage:
> sf probe [bus:]cs [hz] [mode] - init flash device on given SPI bus
> and chip select
> sf read addr offset len - read `len' bytes starting at
> `offset' to memory at `addr'
> sf write addr offset len - write `len' bytes from memory
> at `addr' to flash at `offset'
> sf erase offset [+]len - erase `len' bytes from `offset'
> `+len' round up `len' to block size
> bfin>
> -mike
>
That's a great trick. How much of the drivers did you implement in the
simulator?
How about this, running native under Linux:
$ ./u-boot
U-Boot 2011.03-00793-g0463aab-dirty (Aug 23 2011 - 14:56:06)
DRAM: 128 MiB
Using default environment
In: serial
Out: lcd
Err: lcd
=>sf probe 0
sf probe 0
SF: Detected test with page size 256, total 4 MiB
4096 KiB test at 0:0 is now current device
=>sf read 0 0 0x2000
sf read 0 0 0x2000
=>md 0
md 0
00000000: 282c36b2 17938d43 d7dcbdfd 362e4362 .6,(C.......bC.6
00000010: 00000000 00000000 00000000 00000000 ................
00000020: 00020001 0000000f 0000000b 00400000 .............. at .
00000030: 00000004 00000003 00000003 00000003 ................
00000040: 00000003 00000000 00000116 00000000 ................
00000050: 00000000 00000000 00000116 00000000 ................
00000060: 00000000 00000000 00000116 00000000 ................
00000070: 00000000 00000000 00000116 00000000 ................
00000080: 00000000 00000002 00000003 00000008 ................
00000090: 00000000 0000001a 000002f8 00000000 ................
000000a0: 0000012c 00000002 00000000 e0a61818 ,...............
000000b0: 00000000 00000000 0000000b 00000026 ............&...
000000c0: 00000008 00000003 00000004 00000004 ................
000000d0: 00000002 0000000b 00000003 00000003 ................
000000e0: 00000002 00000001 00000003 00000004 ................
000000f0: 00000003 00000009 0000000c 0000059f ................
=>^C
$
Regards,
Simon
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