[U-Boot] ARM: Incorrect ROM protection range?

Po-Yu Chuang ratbert.chuang at gmail.com
Thu Feb 24 07:06:55 CET 2011


Hi all,

I am using relocation fixed a320evb (arm) u-boot.

I noticed something weird about the output of
command flinfo.

The size of u-boot.bin is 129156 (0x1F884), but the
protected range is only 0 ~ 0x1bfff.

I guess that it is because u-boot protects _start ~ __bss_start,
but there are some other things in u-boot.bin after __bss_start,
e.g. .rel.dyn section and .dynsym section

That is quite strange.
According to arch/arm/cpu/arm920t/u-boot.lds,
.rel.dyn and .dynsym sections should be placed before __bss_start.
However, objdump shows that they are not at where they should be.

Do I understand correctly?
Does anybody have similar situation?

BTW, the toolchain I am using is
arm-none-linux-gnueabi-gcc (Sourcery G++ Lite 2010q1-202) 4.4.1.


0001be8c g     O .u_boot_cmd    00000018 __u_boot_cmd_printenv
0001bea4 g     O .u_boot_cmd    00000018 __u_boot_cmd_setenv
0001bebc g     O .u_boot_cmd    00000018 __u_boot_cmd_run
0001bed4 g     O .u_boot_cmd    00000018 __u_boot_cmd_source
0001beec g     O .u_boot_cmd    00000018 __u_boot_cmd_version
0001bf04 g     O .u_boot_cmd    00000018 __u_boot_cmd_imxtract
0001bf1c g       *ABS*  00000000 __u_boot_cmd_end
0001bf1c g       .bss   00000000 __bss_start
0001bf1c g     O .bss   00000004 monitor_flash_len
0001bf1c g       .rel.dyn       00000000 __rel_dyn_start
0001bf1c l    d  .bss   00000000 .bss
0001bf1c l    d  .rel.dyn       00000000 .rel.dyn
0001bf20 l     O .bss   0000012c images
0001c04c l     O .bss   00000004 os_data_state
0001c050 l     O .bss   00000004 os_data_addr
0001c054 l     O .bss   00000004 bin_start_address
0001c058 l     O .bss   00000004 k_data_escape
0001c05c g     O .bss   00000004 os_data_init
0001c060 l     O .bss   00000004 k_data_escape_saved
0001c064 l     O .bss   00000004 os_data_state_saved
[snip]
0001dcac l     O .bss   00000004 NetRestarted
0001dcb0 g     O .bss   00000004 NetRestartWrap
0001dcb4 l     O .bss   00000004 NetDevExists
0001dcb8 g     O .bss   00001e20 PktBuf
0001f73c g       .dynsym        00000000 __dynsym_start
0001f73c g       .rel.dyn       00000000 __rel_dyn_end
0001f73c l    d  .dynsym        00000000 .dynsym
0001fad8 g     O .bss   00000010 NetRxPackets
0001fae8 g     O .bss   00000620 NetArpWaitPacketBuf
00020108 l     O .bss   00000004 env_changed_id.3244



U-Boot 2011.03-rc1-00134-ga898a11 (Feb 23 2011 - 16:53:13)

DRAM:  64 MiB
Flash: 32.5 MiB
In:    serial
Out:   serial
Err:   serial
Net:   FTMAC100
Hit any key to stop autoboot:  0
A320 # fli 1

Bank # 1: SST 39LF040 flash (8 x 8)  Size: 512 kB in 128 Sectors
  AMD Legacy command set, Manufacturer ID: 0xBF, Device ID: 0xD7
  Erase timeout: 30000 ms, write timeout: 100 ms

  Sector Start Addresses:
  00000000   RO   00001000   RO   00002000   RO   00003000   RO   00004000   RO
  00005000   RO   00006000   RO   00007000   RO   00008000   RO   00009000   RO
  0000A000   RO   0000B000   RO   0000C000   RO   0000D000   RO   0000E000   RO
  0000F000   RO   00010000   RO   00011000   RO   00012000   RO   00013000   RO
  00014000   RO   00015000   RO   00016000   RO   00017000   RO   00018000   RO
  00019000   RO   0001A000   RO   0001B000   RO   0001C000        0001D000
  0001E000        0001F000        00020000        00021000        00022000
  00023000        00024000        00025000        00026000        00027000
  00028000        00029000        0002A000        0002B000        0002C000
  0002D000        0002E000        0002F000        00030000        00031000
  00032000        00033000        00034000        00035000        00036000
  00037000        00038000        00039000        0003A000        0003B000
  0003C000        0003D000        0003E000        0003F000        00040000
  00041000        00042000        00043000        00044000        00045000
  00046000        00047000        00048000        00049000        0004A000
  0004B000        0004C000        0004D000        0004E000        0004F000
  00050000        00051000        00052000        00053000        00054000
  00055000        00056000        00057000        00058000        00059000
  0005A000        0005B000        0005C000        0005D000        0005E000
  0005F000        00060000   RO   00061000   RO   00062000   RO   00063000   RO
  00064000   RO   00065000   RO   00066000   RO   00067000   RO   00068000   RO
  00069000   RO   0006A000   RO   0006B000   RO   0006C000   RO   0006D000   RO
  0006E000   RO   0006F000   RO   00070000   RO   00071000   RO   00072000   RO
  00073000   RO   00074000   RO   00075000   RO   00076000   RO   00077000   RO
  00078000   RO   00079000   RO   0007A000   RO   0007B000   RO   0007C000   RO
  0007D000   RO   0007E000   RO   0007F000   RO

best regards,
Po-Yu Chuang


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