[U-Boot] [PATCH] fsl_esdhc: Correcting esdhc timeout counter calculation

[Fleming Andy-AFLEMING]

On Feb 24, 2011, at 23:35, "Wolfgang Denk" <wd at denx.de> wrote:

> Dear Andy Fleming,
> 
> In message <AANLkTimCt=qiPDC9s2BMYy4nM5R+JWcBiaLLnFo_WA9X at mail.gmail.com> you wrote:
>> 
>> Yeah, that took me a while, too.  Maybe we should update it to make clear:
>> 
>> 1) The formula ends up being (2^(13 + timeout))/mmc->trans_speed = (1/4) seconds
>> --> 2^(13 + timeout) = mmc->trans_speed/4
>> --> 13 + timeout = log2(mmc->trans_speed/4)
>> ...etc
> 
> Does this not depend on the units used for speed, and thus in the end
> on CONFIC_SYS_HZ ?


No, but that wasn't apparent because I didn't mention the units of 2^(13+timeout).  It is in units of sd clocks.

So: num sd clocks = (sd clocks per sec) * 0.25 sec = mmc->tran_speed/4 = 2^(13+regval).

Now, it is true that the actual speed of the sd clock is going to depend on CONFIG_SYS_HZ, in that a tran_speed of 25MHz may not be perfectly achievable with available dividers, but this code is not taking that into account, and the fact that it's rounding up to the next power of two should take care of that.

Andy