[U-Boot] [PATCH] powerpc/85xx: Add SRIO support to P2020DS
Kumar Gala
galak at kernel.crashing.org
Thu Jan 6 18:05:21 CET 2011
From: Li Yang <leoli at freescale.com>
The P2020 has 2 SRIO ports and they are useable on the P2020 DS board.
Enable them using the common SRIO init code.
Signed-off-by: Li Yang <leoli at freescale.com>
Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
---
include/configs/P2020DS.h | 24 +++++++++++++++++++++++-
1 files changed, 23 insertions(+), 1 deletions(-)
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index 24f2498..ca093d8 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -45,6 +45,10 @@
#define CONFIG_SYS_TEXT_BASE 0xeff80000
#endif
+#define CONFIG_SYS_HAS_SRIO
+#define CONFIG_SRIO1 /* SRIO port 1 */
+#define CONFIG_SRIO2 /* SRIO port 2 */
+
#define CONFIG_FSL_ELBC 1 /* Has Enhanced localbus controller */
#define CONFIG_PCI 1 /* Enable PCI/PCIE */
#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
@@ -472,6 +476,24 @@
#define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET
#endif
+/* SRIO1 uses the same window as PCIE2 mem window */
+#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull
+#else
+#define CONFIG_SYS_SRIO1_MEM_PHYS 0xa0000000
+#endif
+#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */
+
+/* SRIO2 uses the same window as PCIE1 mem window */
+#define CONFIG_SYS_SRIO2_MEM_VIRT 0xc0000000
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc40000000ull
+#else
+#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc0000000
+#endif
+#define CONFIG_SYS_SRIO2_MEM_SIZE 0x20000000 /* 512M */
+
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
--
1.6.0.6
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