[U-Boot] [PATCH v2 8/9] mpc85xx: Implement workaround for erratum DDR-A003

[Kumar Gala]

On Dec 17, 2010, at 5:59 PM, York Sun wrote:

> Erratum DDR-A003 requires workaround to correctly set RCW10 for registered DIMM.
> Also adding polling after enabling DDR controller to ensure completion.
> 
> Signed-off-by: York Sun <yorksun at freescale.com>
> ---
> arch/powerpc/cpu/mpc85xx/cmd_errata.c    |    4 ++
> arch/powerpc/cpu/mpc85xx/ddr-gen3.c      |   81 +++++++++++++++++++++++++++++-
> arch/powerpc/include/asm/fsl_ddr_sdram.h |   19 +++++++
> include/configs/P4080DS.h                |    1 +
> 4 files changed, 104 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> index d73f3d7..9edaa0b 100644
> --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> @@ -47,6 +47,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
> #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22)
> 	puts("Work-around for Erratum CPU22 enabled\n");
> #endif
> +#ifdef CONFIG_SYS_FSL_NMG_DDR_A003

change this to CONFIG_SYS_FSL_ERRATUM_DDR_A003

> +	puts("Work-around for Erratum DDR-A003 enabled\n");
> +#endif
> +
> 	return 0;
> }

- k