[U-Boot] [PATCH] ppc, 8xx: remove obsolete km8xx baords from keymile

Holger Brunck holger.brunck at keymile.com
Thu Jan 13 13:31:20 CET 2011


The MPC852 based mgsuvd and kmsupx4 boards boards from keymile
were initially ported but later on not developed further. So
the respective files were removed to avoid unneeded merging and
maintenance.

Signed-off-by: Holger Brunck <holger.brunck at keymile.com>
---
 board/keymile/km8xx/Makefile          |   48 -----
 board/keymile/km8xx/km8xx.c           |  197 -------------------
 board/keymile/km8xx/km8xx_hdlc_enet.c |  278 ---------------------------
 board/keymile/km8xx/u-boot.lds        |   97 ----------
 boards.cfg                            |    2 -
 include/configs/km8xx.h               |  332 ---------------------------------
 include/configs/kmsupx4.h             |   43 -----
 include/configs/mgsuvd.h              |   40 ----
 8 files changed, 0 insertions(+), 1037 deletions(-)
 delete mode 100644 board/keymile/km8xx/Makefile
 delete mode 100644 board/keymile/km8xx/km8xx.c
 delete mode 100644 board/keymile/km8xx/km8xx_hdlc_enet.c
 delete mode 100644 board/keymile/km8xx/u-boot.lds
 delete mode 100644 include/configs/km8xx.h
 delete mode 100644 include/configs/kmsupx4.h
 delete mode 100644 include/configs/mgsuvd.h

diff --git a/board/keymile/km8xx/Makefile b/board/keymile/km8xx/Makefile
deleted file mode 100644
index abb9ef9..0000000
--- a/board/keymile/km8xx/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2007
-# Heiko Schocher, DENX Software Engineering, hs at denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
-endif
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS	= $(BOARD).o ../common/common.o ../common/keymile_hdlc_enet.o \
-		km8xx_hdlc_enet.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(OBJS)
-	$(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/keymile/km8xx/km8xx.c b/board/keymile/km8xx/km8xx.c
deleted file mode 100644
index 6de2f22..0000000
--- a/board/keymile/km8xx/km8xx.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * (C) Copyright 2007
- * Heiko Schocher, DENX Software Engineering, hs at denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <common.h>
-#include <mpc8xx.h>
-#include <net.h>
-#include <asm/io.h>
-
-#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
-#endif
-
-#include "../common/common.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-const uint sdram_table[] =
-{
-	0x0f07fc04, 0x0ffffc04, 0x00bdfc04, 0x0ff77c00,
-	0x1ffffc05, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-	/* 0x08 Burst Read */
-	0x0f07fc04, 0x0ffffc04, 0x00bdfc04, 0x00fffc00,
-	0x00fffc00, 0x00fffc00, 0x0ff77c00, 0x1ffffc05,
-	/* 0x10 Load mode register */
-	0x0ffffc34, 0x0ff57c04, 0x0ffffc04, 0x1ffffc05,
-	0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-	/* 0x18 Single Write */
-	0x0f07fc04, 0x0ffffc00, 0x00bd7c04, 0x0ffffc04,
-	0x0ff77c04, 0x1ffffc05, 0xfffffc04, 0xfffffc04,
-	/* 0x20 Burst Write */
-	0x0f07fc04, 0x0ffffc00, 0x00bd7c00, 0x00fffc00,
-	0x00fffc00, 0x00fffc04, 0x0ffffc04, 0x0ff77c04,
-	0x1ffffc05, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-	0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-	/* 0x30 Precharge all and Refresh */
-	0x0ff77c04, 0x0ffffc04, 0x0ff5fc84, 0x0ffffc04,
-	0x0ffffc04, 0x0ffffc84, 0x1ffffc05, 0xfffffc04,
-	0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-	/* 0x3C Exception */
-	0x7ffffc04, 0xfffffc07, 0xfffffc04, 0xfffffc04,
-};
-
-int checkboard (void)
-{
-	puts ("Board: Keymile ");
-#if defined(CONFIG_KMSUPX4)
-	puts ("kmsupx4");
-#else
-	puts ("mgsuvd");
-#endif
-	if (ethernet_present ())
-		puts (" with PIGGY.");
-	puts ("\n");
-	return (0);
-}
-
-phys_size_t initdram (int board_type)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	long int size;
-
-	upmconfig (UPMB, (uint *) sdram_table,
-			   sizeof (sdram_table) / sizeof (uint));
-
-	/*
-	 * Preliminary prescaler for refresh (depends on number of
-	 * banks): This value is selected for four cycles every 62.4 us
-	 * with two SDRAM banks or four cycles every 31.2 us with one
-	 * bank. It will be adjusted after memory sizing.
-	 */
-	memctl->memc_mptpr = CONFIG_SYS_MPTPR;
-
-	/*
-	 * The following value is used as an address (i.e. opcode) for
-	 * the LOAD MODE REGISTER COMMAND during SDRAM initialisation. If
-	 * the port size is 32bit the SDRAM does NOT "see" the lower two
-	 * address lines, i.e. mar=0x00000088 -> opcode=0x00000022 for
-	 * MICRON SDRAMs:
-	 * ->    0 00 010 0 010
-	 *       |  |   | |   +- Burst Length = 4
-	 *       |  |   | +----- Burst Type   = Sequential
-	 *       |  |   +------- CAS Latency  = 2
-	 *       |  +----------- Operating Mode = Standard
-	 *       +-------------- Write Burst Mode = Programmed Burst Length
-	 */
-	memctl->memc_mar = CONFIG_SYS_MAR;
-
-	/*
-	 * Map controller banks 1 to the SDRAM banks 1 at
-	 * preliminary addresses - these have to be modified after the
-	 * SDRAM size has been determined.
-	 */
-	memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
-	memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;
-
-	memctl->memc_mbmr = CONFIG_SYS_MBMR & (~(MBMR_PTBE));	/* no refresh yet */
-
-	udelay (200);
-
-	/* perform SDRAM initializsation sequence */
-
-	memctl->memc_mcr = 0x80802830;	/* SDRAM bank 0 */
-	udelay (1);
-	memctl->memc_mcr = 0x80802110;	/* SDRAM bank 0 - execute twice */
-	udelay (1);
-
-	memctl->memc_mbmr |= MBMR_PTBE;	/* enable refresh */
-
-	udelay (1000);
-
-	/*
-	 * Check Bank 0 Memory Size for re-configuration
-	 *
-	 */
-	size =  get_ram_size(SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
-
-	udelay (1000);
-
-	debug ("SDRAM Bank 0: %ld MB\n", size >> 20);
-
-	return (size);
-}
-
-/*
- * Early board initalization.
- */
-int board_early_init_r(void)
-{
-	/* setup the UPIOx */
-	/* General Unit Reset disabled, Flash Bank enabled, UnitLed on */
-	out_8((u8 *)(CONFIG_SYS_PIGGY_BASE + 0x02), 0xc2);
-	/* SCC4 enable, halfduplex, FCC1 powerdown, ANDI enable*/
-	out_8((u8 *)(CONFIG_SYS_PIGGY_BASE + 0x03), 0x35);
-	return 0;
-}
-
-int hush_init_var (void)
-{
-	ivm_read_eeprom ();
-	return 0;
-}
-
-#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
-/*
- * update "brg" property in the blob
- */
-void ft_blob_update (void *blob, bd_t *bd)
-{
-	ulong brg_data[1] = {0};
-
-	/* BRG */
-	brg_data[0] = cpu_to_be32 (bd->bi_busfreq);
-	fdt_set_node_and_value (blob, "/soc/cpm", "brg-frequency", brg_data,
-				sizeof (brg_data));
-
-	/* MAC adr */
-	fdt_set_node_and_value (blob, "/soc/cpm/ethernet", "mac-address",
-				bd->bi_enetaddr, sizeof (u8) * 6);
-}
-
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	ft_cpu_setup (blob, bd);
-	ft_blob_update (blob, bd);
-}
-#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
-
-int i2c_soft_read_pin (void)
-{
-	int val;
-
-	*(unsigned short *)(I2C_BASE_DIR) &=  ~SDA_CONF;
-	udelay(1);
-	val = *(unsigned char *)(I2C_BASE_PORT);
-
-	return ((val & SDA_BIT) == SDA_BIT);
-}
diff --git a/board/keymile/km8xx/km8xx_hdlc_enet.c
b/board/keymile/km8xx/km8xx_hdlc_enet.c
deleted file mode 100644
index ca00576..0000000
--- a/board/keymile/km8xx/km8xx_hdlc_enet.c
+++ /dev/null
@@ -1,278 +0,0 @@
-/*
- * (C) Copyright 2008
- * Gary Jennejohn, DENX Software Engineering GmbH, garyj at denx.de.
- *
- * Based in part on arch/powerpc/cpu/mpc8xx/scc.c.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>	/* commproc.h is included here */
-#include <malloc.h>
-#include <net.h>
-
-#ifdef CONFIG_KEYMILE_HDLC_ENET
-
-#include "../common/keymile_hdlc_enet.h"
-
-char keymile_slot;	/* our slot number in the backplane */
-
-/*
- * Since, except during initialization, ethact is always HDLC
- * while we're in the driver, just use serial_printf() everywhere for
- * output.  This avoids possible conflicts when netconsole is being
- * used.
- */
-#define dprintf(fmt, args...)	serial_printf(fmt, ##args)
-
-static int already_inited;
-
-/*
-  * SCC Ethernet Tx and Rx buffer descriptors allocated at the
-  *  immr->udata_bd address on Dual-Port RAM
-  * Provide for Double Buffering
-  */
-typedef volatile struct CommonBufferDescriptor {
-    cbd_t txbd;			/* Tx BD */
-    cbd_t rxbd[HDLC_PKTBUFSRX];	/* Rx BD */
-} RTXBD;
-
-static RTXBD *rtx;
-
-int keymile_hdlc_enet_init(struct eth_device *, bd_t *);
-void keymile_hdlc_enet_halt(struct eth_device *);
-extern void keymile_hdlc_enet_init_bds(RTXBD *);
-extern void initCachedNumbers(int);
-
-/* Use SCC4 */
-#define MGS_CPM_CR_HDLC	CPM_CR_CH_SCC4
-#define MGS_PROFF_HDLC	PROFF_SCC4
-#define MGS_SCC_HDLC	3	/* Index, not number! */
-
-int keymile_hdlc_enet_init(struct eth_device *dev, bd_t *bis)
-{
-	/* int i; */
-	/* volatile cbd_t *bdp; */
-	volatile cpm8xx_t *cp;
-	volatile scc_t *sccp;
-	volatile hdlc_pram_t *hpr;
-	volatile iop8xx_t *iop;
-
-	if (already_inited)
-		return 0;
-
-	cp = (cpm8xx_t *)&(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm);
-	hpr = (hdlc_pram_t *)(&cp->cp_dparam[MGS_PROFF_HDLC]);
-	sccp = (volatile scc_t *)(&cp->cp_scc[MGS_SCC_HDLC]);
-	iop = (iop8xx_t *)&(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport);
-
-	/*
-	 * Disable receive and transmit just in case.
-	 */
-	sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
-#ifndef CONFIG_SYS_ALLOC_DPRAM
-#error "CONFIG_SYS_ALLOC_DPRAM must be defined"
-#else
-	/*
-	 * Avoid exhausting DPRAM, which would cause a panic.
-	 * Actually this isn't really necessary, but leave it here
-	 * for safety's sake.
-	 */
-	if (rtx == NULL) {
-		rtx = (RTXBD *) (cp->cp_dpmem +
-			 dpram_alloc_align(sizeof(RTXBD), 8));
-		if (rtx == (RTXBD *)CPM_DP_NOSPACE)
-			return -1;
-		memset((void *)rtx, 0, sizeof(RTXBD));
-	}
-#endif /* !CONFIG_SYS_ALLOC_DPRAM */
-
-	/* We need the slot number for addressing. */
-	keymile_slot = *(char *)(CONFIG_SYS_SLOT_ID_BASE +
-		CONFIG_SYS_SLOT_ID_OFF) & CONFIG_SYS_SLOT_ID_MASK;
-	/*
-	 * Be consistent with the Linux driver and set
-	 * only enetaddr[0].
-	 *
-	 * Always add 1 to the slot number so that
-	 * there are no problems with an ethaddr which
-	 * is all 0s.  This should be acceptable because
-	 * a board should never have a slot number of 255,
-	 * which is the broadcast address.  The HDLC addressing
-	 * uses only the slot number.
-	 */
-	dev->enetaddr[0] = keymile_slot + 1;
-
-#ifdef TEST_IT
-	dprintf("slot %d\n", keymile_slot);
-#endif
-
-	/* use pa8, pa9 pins for TXD4, RXD4 respectively */
-	iop->iop_papar |= ((0x8000 >> 8) | (0x8000 >> 9));
-	iop->iop_padir &= ~((0x8000 >> 8) | (0x8000 >> 9));
-	iop->iop_paodr &= ~((0x8000 >> 8) | (0x8000 >> 9));
-
-	/* also use pa0 as CLK8 */
-	iop->iop_papar |= 0x8000;
-	iop->iop_padir &= ~0x8000;
-	iop->iop_paodr &= ~0x8000;
-
-	/* use pc5 as CTS4 */
-	iop->iop_pcpar &= ~(0x8000 >> 5);
-	iop->iop_pcdir &= ~(0x8000 >> 5);
-	iop->iop_pcso  |= (0x8000 >> 5);
-
-	/*
-	 * SI clock routing
-	 * use CLK8
-	 * this also connects SCC4 to NMSI
-	 */
-	cp->cp_sicr = (cp->cp_sicr & ~0xff000000) | 0x3f000000;
-
-	/* keymile_rxIdx = 0; */
-
-	/*
-	 * Initialize function code registers for big-endian.
-	 */
-	hpr->rfcr = SCC_EB;
-	hpr->tfcr = SCC_EB;
-
-	/*
-	 * Set maximum bytes per receive buffer.
-	 */
-	hpr->mrblr = MAX_FRAME_LENGTH;
-
-	/* Setup CRC generator values for HDLC */
-	hpr->c_mask = 0x0000F0B8;
-	hpr->c_pres = 0x0000FFFF;
-
-	/* Initialize all error counters to 0 */
-	hpr->disfc = 0;
-	hpr->crcec = 0;
-	hpr->abtsc = 0;
-	hpr->nmarc = 0;
-	hpr->retrc = 0;
-
-	/* Set maximum frame length size */
-	hpr->mflr = MAX_FRAME_LENGTH;
-
-	/* set to 1 for per frame processing change later if needed */
-	hpr->rfthr = 1;
-
-	hpr->hmask = 0xff;
-
-	hpr->haddr2 = SET_HDLC_UUA(keymile_slot);
-	hpr->haddr3 = hpr->haddr2;
-	hpr->haddr4 = hpr->haddr2;
-	/* broadcast */
-	hpr->haddr1 = HDLC_BCAST;
-
-	hpr->rbase = (unsigned int) &rtx->rxbd[0];
-	hpr->tbase = (unsigned int) &rtx->txbd;
-
-#if 0
-	/*
-	 * Initialize the buffer descriptors.
-	 */
-	bdp = &rtx->txbd;
-	bdp->cbd_sc = 0;
-	bdp->cbd_bufaddr = 0;
-	bdp->cbd_sc = BD_SC_WRAP;
-
-	/*
-	 *	Setup RX packet buffers, aligned correctly.
-	 *	Borrowed from net/net.c.
-	 */
-	MyRxPackets[0] = &MyPktBuf[0] + (PKTALIGN - 1);
-	MyRxPackets[0] -= (ulong)MyRxPackets[0] % PKTALIGN;
-	for (i = 1; i < HDLC_PKTBUFSRX; i++)
-		MyRxPackets[i] = MyRxPackets[0] + i * PKT_MAXBLR_SIZE;
-
-	bdp = &rtx->rxbd[0];
-	for (i = 0; i < HDLC_PKTBUFSRX; i++) {
-		bdp->cbd_sc = BD_SC_EMPTY;
-		/* Leave space at the start for INET header. */
-		bdp->cbd_bufaddr = (unsigned int)(MyRxPackets[i] +
-			INET_HDR_ALIGN);
-		bdp++;
-	}
-	bdp--;
-	bdp->cbd_sc |= BD_SC_WRAP;
-#else
-	keymile_hdlc_enet_init_bds(rtx);
-#endif
-
-	/* Let's re-initialize the channel now.	 We have to do it later
-	 * than the manual describes because we have just now finished
-	 * the BD initialization.
-	 */
-	cp->cp_cpcr = mk_cr_cmd(MGS_CPM_CR_HDLC, CPM_CR_INIT_TRX) | CPM_CR_FLG;
-	while (cp->cp_cpcr & CPM_CR_FLG);
-
-	sccp->scc_gsmrl = SCC_GSMRL_MODE_HDLC;
-	/* CTSS=1 */
-	sccp->scc_gsmrh = SCC_GSMRH_CTSS;
-	/* NOF=0, RTE=1, DRT=0, BUS=1 */
-	sccp->scc_psmr = ((0x8000 >> 6) | (0x8000 >> 10));
-
-/* loopback for local testing */
-#ifdef GJTEST
-	dprintf("LOOPBACK!\n");
-	sccp->scc_gsmrl |= SCC_GSMRL_DIAG_LOOP;
-#endif
-
-	/*
-	 * Disable all interrupts and clear all pending
-	 * events.
-	 */
-	sccp->scc_sccm = 0;
-	sccp->scc_scce = 0xffff;
-
-	/*
-	 * And last, enable the transmit and receive processing.
-	 */
-	sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
-	dprintf("%s: HDLC ENET Version 0.3 on SCC%d\n", dev->name,
-		MGS_SCC_HDLC + 1);
-
-	/*
-	 * We may not get an ARP packet because ARP was already done on
-	 * a different interface, so initialize the cached values now.
-	 */
-	initCachedNumbers(1);
-
-	already_inited = 1;
-
-	return 0;
-}
-
-void keymile_hdlc_enet_halt(struct eth_device *dev)
-{
-#if 0 /* just return, but keep this for reference */
-	volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
-
-	/* maybe should do a graceful stop here? */
-	immr->im_cpm.cp_scc[MGS_SCC_HDLC].scc_gsmrl &=
-		~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-}
-
-#endif /* CONFIG_KEYMILE_HDLC_ENET */
diff --git a/board/keymile/km8xx/u-boot.lds b/board/keymile/km8xx/u-boot.lds
deleted file mode 100644
index ea70ae4..0000000
--- a/board/keymile/km8xx/u-boot.lds
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .text      :
-  {
-    arch/powerpc/cpu/mpc8xx/start.o	(.text*)
-    arch/powerpc/cpu/mpc8xx/traps.o	(.text*)
-
-    *(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.rodata)
-    *(.rodata1)
-    *(.rodata.str1.4)
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    KEEP(*(.got))
-    _GOT2_TABLE_ = .;
-    KEEP(*(.got2))
-    _FIXUP_TABLE_ = .;
-    KEEP(*(.fixup))
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data*)
-    *(.sdata*)
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.bss*)
-   *(.sbss*)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-  _end = . ;
-  PROVIDE (end = .);
-}
diff --git a/boards.cfg b/boards.cfg
index 4bc3d08..c5c0489 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -594,8 +594,6 @@ SXNI855T                     powerpc     mpc8xx      sixnet
 v37                          powerpc     mpc8xx
 MHPC                         powerpc     mpc8xx      mhpc                eltec
 TOP860                       powerpc     mpc8xx      top860              emk
-kmsupx4                      powerpc     mpc8xx      km8xx               keymile
-mgsuvd                       powerpc     mpc8xx      km8xx               keymile
 KUP4K                        powerpc     mpc8xx      kup4k               kup
 KUP4X                        powerpc     mpc8xx      kup4x               kup
 ELPT860                      powerpc     mpc8xx      elpt860             LEOX
diff --git a/include/configs/km8xx.h b/include/configs/km8xx.h
deleted file mode 100644
index 9938acd..0000000
--- a/include/configs/km8xx.h
+++ /dev/null
@@ -1,332 +0,0 @@
-/*
- * (C) Copyright 2009
- * Heiko Schocher, DENX Software Engineering, hs at denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * configuration options, keymile 8xx board specific
- */
-
-#ifndef __CONFIG_KM8XX_H
-#define __CONFIG_KM8XX_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_KM8XX		1	/* on a km8xx board */
-
-/* include common defines/options for all Keymile boards */
-#include "keymile-common.h"
-#include "km-powerpc.h"
-
-#if defined(CONFIG_KMSUPX4)
-#undef	CONFIG_I2C_MUX			/* no I2C mux on this board */
-#endif
-
-#define CONFIG_8xx_GCLK_FREQ		66000000
-
-#define CONFIG_SYS_SMC_UCODE_PATCH	1	/* Relocate SMC1 */
-#define CONFIG_SYS_SMC_DPMEM_OFFSET	0x1fc0
-#define CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1 */
-#define CONFIG_SYS_SMC_RXBUFLEN	128
-#define CONFIG_SYS_MAXIDLE	10
-
-#define CONFIG_SYS_CPM_BOOTCOUNT_ADDR	0x1eb0	/* In case of SMC relocation,
-						 * the default value is not
-						 * working
-						 */
-
-#define CONFIG_PREBOOT	"echo;" \
-	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
-	"echo"
-
-#define BOOTFLASH_START	0xF0000000
-
-#define CONFIG_KM_CONSOLE_TTY	"ttyCPM0"
-
-#if defined(CONFIG_MGSUVD)
-#define CONFIG_ENV_IVM	"EEprom_ivm=pca9544a:70:4 \0"
-#else
-#define CONFIG_ENV_IVM	""
-#endif
-
-#define MTDIDS_DEFAULT		"nor0=boot"
-#define MTDPARTS_DEFAULT	"mtdparts="				\
-	"boot:"								\
-		"768k(u-boot),"						\
-		"128k(env),"						\
-		"128k(envred),"						\
-		"-(" CONFIG_KM_UBI_PARTITION_NAME ")"
-
-#define CONFIG_EXTRA_ENV_SETTINGS					\
-	CONFIG_ENV_IVM							\
-	CONFIG_KM_DEF_ENV						\
-	"mtdids=" MTDIDS_DEFAULT "\0"					\
-	"mtdparts=" MTDPARTS_DEFAULT "\0"				\
-	"newenv="							\
-		"prot off 0xF00C0000 0xF00FFFFF && "			\
-		"era 0xF00C0000 0xF00FFFFF\0"				\
-	"rootpath=/opt/eldk/ppc_8xx\0"					\
-	""
-
-#undef CONFIG_RTC_MPC8xx		/* MPC866 does not support RTC	*/
-
-#define	CONFIG_TIMESTAMP		/* but print image timestmps	*/
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-/*-----------------------------------------------------------------------
- * Internal Memory Mapped Register
- */
-#define CONFIG_SYS_IMMR		0xFFF00000
-
-/*-----------------------------------------------------------------------
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_SIZE	0x2F00	/* Size of used area in DPRAM	*/
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE -
GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-/*-----------------------------------------------------------------------
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_FLASH_BASE		0xf0000000
-#define CONFIG_SYS_MONITOR_LEN		(768 << 10) /* 768 kB for Monitor */
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)
-
-/*-----------------------------------------------------------------------
- * FLASH organization
- */
-/* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1
-#define CONFIG_SYS_FLASH_SIZE		32
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-/* max num of sects on one chip */
-#define CONFIG_SYS_MAX_FLASH_SECT	256
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	120000	/* (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* (in ms) */
-
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_OFFSET	CONFIG_SYS_MONITOR_LEN
-#define CONFIG_ENV_SECT_SIZE	0x20000 /* Total Size of Environment Sector */
-
-/* Address and size of Redundant Environment Sector	*/
-#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
-#define CONFIG_ENV_BUFFER_PRINT		1
-
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE	16	/* For all MPC8xx CPUs	*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CACHELINE_SHIFT	4	/* log base 2 of the above value */
-#endif
-
-/*-----------------------------------------------------------------------
- * SYPCR - System Protection Control				11-9
- * SYPCR can only be written once after reset!
- *-----------------------------------------------------------------------
- * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
- */
-#define CONFIG_SYS_SYPCR	0xffffff89
-
-/*-----------------------------------------------------------------------
- * SIUMCR - SIU Module Configuration				11-6
- *-----------------------------------------------------------------------
- */
-#if defined(CONFIG_MGSUVD)
-#define CONFIG_SYS_SIUMCR	0x00610480
-#else
-#define CONFIG_SYS_SIUMCR	0x00610400
-#endif
-
-/*-----------------------------------------------------------------------
- * TBSCR - Time Base Status and Control				11-26
- *-----------------------------------------------------------------------
- * Clear Reference Interrupt Status, Timebase freezing enabled
- */
-#define CONFIG_SYS_TBSCR	(TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
-
-/*-----------------------------------------------------------------------
- * PISCR - Periodic Interrupt Status and Control		11-31
- *-----------------------------------------------------------------------
- * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
- */
-#define CONFIG_SYS_PISCR	(PISCR_PS | PISCR_PITF)
-
-/*-----------------------------------------------------------------------
- * SCCR - System Clock and reset Control Register		15-27
- *-----------------------------------------------------------------------
- * Set clock output, timebase and RTC source and divider,
- * power management and some other internal clocks
- */
-#if defined(CONFIG_MGSUVD)
-#define SCCR_MASK	0x01800000
-#else
-#define SCCR_MASK	0x00000000
-#endif
-#define CONFIG_SYS_SCCR	0x01800000
-
-#define CONFIG_SYS_DER 0
-
-/*
- * Init Memory Controller:
- *
- * BR0/1 and OR0/1 (FLASH)
- */
-
-#define FLASH_BASE0_PRELIM	0xf0000000	/* FLASH bank #0	*/
-
-/* used to re-map FLASH both when starting from SRAM or FLASH:
- * restrict access enough to keep SRAM working (if any)
- * but not too much to meddle with FLASH accesses
- */
-#define CONFIG_SYS_REMAP_OR_AM		0x80000000	/* OR addr mask */
-#define CONFIG_SYS_PRELIM_OR_AM	0xE0000000	/* OR addr mask */
-
-/*
- * FLASH timing: Default value of OR0 after reset
- */
-#define CONFIG_SYS_OR0_PRELIM	0xfe000954
-#define CONFIG_SYS_BR0_PRELIM	0xf0000401
-
-/*
- * BR1 and OR1 (SDRAM)
- *
- */
-#define SDRAM_BASE1_PRELIM	0x00000000	/* SDRAM bank #0	*/
-#define SDRAM_MAX_SIZE		(64 << 20)	/* max 64 MB per bank	*/
-
-/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */
-#define CONFIG_SYS_OR_TIMING_SDRAM	0x00000A00
-
-#define CONFIG_SYS_OR1_PRELIM	0xfc000800
-#define CONFIG_SYS_BR1_PRELIM	(0x000000C0 | 0x01)
-
-#define CONFIG_SYS_MPTPR	0x0200
-/* PTB=16, AMB=001, FIXME 1 RAS precharge cycles, 1 READ loop cycle (not used),
-   1 Write loop Cycle (not used), 1 Timer Loop Cycle */
-#if defined(CONFIG_MGSUVD)
-#define CONFIG_SYS_MBMR	0x10964111
-#else
-#define CONFIG_SYS_MBMR	0x20964111
-#endif
-#define CONFIG_SYS_MAR		0x00000088
-
-/*
- * 4096	Rows from SDRAM example configuration
- * 1000	factor s -> ms
- * 64	PTP (pre-divider from MPTPR) from SDRAM example configuration
- * 4	Number of refresh cycles per period
- * 64	Refresh cycle in ms per number of rows
- */
-#define CONFIG_SYS_PTA_PER_CLK	((4096 * 64 * 1000) / (4 * 64))
-
-/* GPIO/PIGGY on CS3 initialization values
-*/
-#define CONFIG_SYS_PIGGY_BASE	(0x30000000)
-#if defined(CONFIG_MGSUVD)
-#define CONFIG_SYS_OR3_PRELIM	(0xfe000d24)
-#define CONFIG_SYS_BR3_PRELIM	(0x30000401)
-#else
-#define CONFIG_SYS_OR3_PRELIM	(0xf8000d26)
-#define CONFIG_SYS_BR3_PRELIM	(0x30000401)
-#endif
-
-#define CONFIG_SCC3_ENET
-#define CONFIG_ETHPRIME		"SCC"
-#define CONFIG_HAS_ETH0
-
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT	1
-#define CONFIG_OF_BOARD_SETUP	1
-
-#define OF_STDOUT_PATH		"/soc/cpm/serial at a80"
-
-/* enable I2C and select the hardware/software driver */
-#undef	CONFIG_HARD_I2C			/* I2C with hardware support */
-#define	CONFIG_SOFT_I2C		1	/* I2C bit-banged	*/
-/* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SPEED		50000
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-#define I2C_SOFT_DECLARATIONS
-
-/*
- * Software (bit-bang) I2C driver configuration
- */
-#define I2C_BASE_DIR	((u16 *)(CONFIG_SYS_PIGGY_BASE + 0x04))
-#define I2C_BASE_PORT	((u8 *)(CONFIG_SYS_PIGGY_BASE + 0x09))
-
-#define SDA_BIT		0x40
-#define SCL_BIT		0x80
-#define SDA_CONF	0x1000
-#define SCL_CONF	0x2000
-
-#define I2C_ACTIVE	do {} while (0)
-#define I2C_TRISTATE	do {} while (0)
-#define I2C_READ	((in_8(I2C_BASE_PORT) & SDA_BIT) == SDA_BIT)
-#define I2C_SDA(bit)	if(bit) { \
-				clrbits(be16, I2C_BASE_DIR, SDA_CONF); \
-			} else { \
-				clrbits(8, I2C_BASE_PORT, SDA_BIT); \
-				setbits(be16, I2C_BASE_DIR, SDA_CONF); \
-			}
-#define I2C_SCL(bit)	if(bit) { \
-				clrbits(be16, I2C_BASE_DIR, SCL_CONF); \
-			} else { \
-				clrbits(8, I2C_BASE_PORT, SCL_BIT); \
-				setbits(be16, I2C_BASE_DIR, SCL_CONF); \
-			}
-#define I2C_DELAY	udelay(50)	/* 1/4 I2C clock duration */
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
-
-/* I2C SYSMON (LM75, AD7414 is almost compatible)		*/
-#define CONFIG_DTT_LM75		1	/* ON Semi's LM75	*/
-#if defined(CONFIG_MGSUVD)
-#define CONFIG_DTT_SENSORS	{0, 2, 4, 6}	/* Sensor addresses */
-#else
-#define CONFIG_DTT_SENSORS	{0}	/* Sensor addresses */
-#endif
-#define CONFIG_SYS_DTT_MAX_TEMP	70
-#define CONFIG_SYS_DTT_LOW_TEMP	-30
-#define CONFIG_SYS_DTT_HYSTERESIS	3
-#define CONFIG_SYS_DTT_BUS_NUM		(CONFIG_SYS_MAX_I2C_BUS)
-#endif	/* __CONFIG_KM8XX_H */
diff --git a/include/configs/kmsupx4.h b/include/configs/kmsupx4.h
deleted file mode 100644
index 228bdd7..0000000
--- a/include/configs/kmsupx4.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * (C) Copyright 2009
- * Heiko Schocher, DENX Software Engineering, hs at denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_MPC852T		1	/* This is a MPC852T CPU	*/
-#define CONFIG_KMSUPX4		1	/* ...on a kmsupx4 board	*/
-#define CONFIG_HOSTNAME		kmsupx4
-
-#define	CONFIG_SYS_TEXT_BASE	0xf0000000
-
-/* include common defines/options for all Keymile 8xx boards */
-#include "km8xx.h"
-
-#define CONFIG_SYS_DELAYED_ICACHE	1	/* enable ICache not before
-						 * running in RAM.
-						 */
-#endif	/* __CONFIG_H */
diff --git a/include/configs/mgsuvd.h b/include/configs/mgsuvd.h
deleted file mode 100644
index 6036da8..0000000
--- a/include/configs/mgsuvd.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * (C) Copyright 2007
- * Heiko Schocher, DENX Software Engineering, hs at denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * board/config.h - configuration options, board specific
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_MPC866		1	/* This is a MPC866 CPU		*/
-#define CONFIG_MGSUVD		1	/* ...on a mgsuvd board	*/
-#define CONFIG_HOSTNAME		mgsuvd
-
-#define	CONFIG_SYS_TEXT_BASE	0xf0000000
-
-/* include common defines/options for all Keymile 8xx boards */
-#include "km8xx.h"
-
-#endif	/* __CONFIG_H */
-- 
1.7.0.5



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