[U-Boot] [PATCH] mpc83xx:fix pcie configuration space read/write

[Sergei Shtylyov]

Hello.

On 15-01-2011 14:22, Baidu Boy wrote:

> This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is
> connected with switch or we use both of the two pcie controller.

> Signed-off-by: Baidu Boy <liucai.lfn at gmail.com>
[...]

> diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
> index 46a706d..c59e482 100644
> --- a/arch/powerpc/cpu/mpc83xx/pcie.c
> +++ b/arch/powerpc/cpu/mpc83xx/pcie.c
> @@ -30,6 +30,20 @@ DECLARE_GLOBAL_DATA_PTR;
>
>   #define PCIE_MAX_BUSES 2
>
> +/*private struct for mpc83xx pcie hose*/
> +static struct mpc83xx_pcie_priv{

    Need space before { here.

> +	u8 index;
> +}pcie_priv[PCIE_MAX_BUSES] = {

    And after } here.

> @@ -52,7 +66,8 @@ static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev)
>   {
>   	int bus = PCI_BUS(dev) - hose->first_busno;
>   	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
> -	pex83xx_t *pex =&immr->pciexp[bus];
> +	struct mpc83xx_pcie_priv *pcie_priv = (struct mpc83xx_pcie_priv *)hose->priv_data;

    'priv_data' is of type 'void *', so the type cast is not needed.

> +	pex83xx_t *pex =&immr->pciexp[pcie_priv->index];
>   	struct pex_outbound_window *out_win =&pex->bridge.pex_outbound_win[0];
>   	u8 devfn = PCI_DEV(dev)<<  3 | PCI_FUNC(dev);
>   	u32 dev_base = bus<<  24 | devfn<<  16;
> @@ -142,6 +157,8 @@ static void mpc83xx_pcie_register_hose(int bus, struct pci_region *reg,
>
>   	hose->cfg_addr = (unsigned int *)mpc83xx_pcie_cfg_space[bus].base;
>
> +	hose->priv_data = (void *)&pcie_priv[bus];

    Likewise, there's no need to cast to 'void *' -- the cast is automatic.

WBR, Sergei