[U-Boot] [PATCH V4 2/5] ARM: Add Support for Marvell Pantheon Familiy SoCs

[Wolfgang Denk]

Dear Lei Wen,

In message <1294754710-7834-3-git-send-email-leiwen at marvell.com> you wrote:
> Pantheon Family processors are highly integrated SoCs
> based on Sheeva_88SV331x-v5 PJ1 cpu core.
> Ref:
> http://www.marvell.com/products/processors/communications/marvell_pantheon_910_920_pb.pdf
...
> +/* For preventing risk of instability in reading counter value,
> + * first set read request to register cvwr and then read same
> + * register after it captures counter value.
> + */

Incorrect multiline comment style.  Please fix globally.

> +ulong read_timer(void)
> +{
> +	struct panthtmr_registers *panthtimers =
> +		(struct panthtmr_registers *) PANTHEON_TIMER_BASE;
> +	volatile int loop=100;
> +
> +	writel(COUNT_RD_REQ, &panthtimers->cvwr);
> +	while (loop--);

Please write this as

	while (loop--)
		;

Please fix globally.


Best regards,

Wolfgang Denk

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