[U-Boot] [PATCH 1/2] cmd_ide: enhance new feature "CONFIG_IDE_AHB"

[Macpaul Lin]

Although most IDE controller is designed to be connected to PCI bridge,
there are still some IDE controller support AHB interface for SoC design.

The driver implementation of these IDE-AHB controllers differ from other
IDE-PCI controller, some additional registers and commands access is required
during CMD/DATA I/O. Hence a configuration "CONFIG_IDE_AHB" in cmd_ide.c is
required to be defined to support these kinds of SoC controllers. Such as
Faraday's FTIDE020 series and Global Unichip's UINF-0301.

Signed-off-by: Macpaul Lin <macpaul at andestech.com>
---
 README           |    8 ++++++++
 common/cmd_ide.c |   37 ++++++++++++++++++++++++++++++++++++-
 2 files changed, 44 insertions(+), 1 deletions(-)

diff --git a/README b/README
index 727bf8a..3de0605 100644
--- a/README
+++ b/README
@@ -2673,6 +2673,14 @@ Low Level (hardware related) configuration options:
 		source code. It is used to make hardware dependant
 		initializations.
 
+- CONFIG_IDE_AHB:
+		Most IDE controllers were designed to be connected with PCI
+		interface. Only few of them were designed for AHB interface.
+		When software is doing ATA command and data transfer to
+		IDE devices through IDE-AHB controller, some additional
+		registers accessing to these kind of IDE-AHB controller
+		is requierd.
+
 - CONFIG_SYS_IMMR:	Physical address of the Internal Memory.
 		DO NOT CHANGE unless you know exactly what you're
 		doing! (11-4) [MPC8xx/82xx systems only]
diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index ea0f4a7..edb4fc0 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -518,8 +518,22 @@ __ide_outb(int dev, int port, unsigned char val)
 {
 	debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
 		dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
+
+#if defined(CONFIG_IDE_AHB)
+	if (port) {
+		/* write command */
+		extern void ide_write_register(int, unsigned int, unsigned char);
+
+		ide_write_register(dev, port, val);
+	} else {
+		/* write data */
+		outb(val, (ATA_CURR_BASE(dev)));
+	}
+#else
 	outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
+#endif
 }
+
 void ide_outb (int dev, int port, unsigned char val)
 		__attribute__((weak, alias("__ide_outb")));
 
@@ -527,7 +541,15 @@ unsigned char inline
 __ide_inb(int dev, int port)
 {
 	uchar val;
+
+#if defined(CONFIG_IDE_AHB)
+	extern unsigned char ide_read_register(int, unsigned int);
+
+	val = ide_read_register(dev, port);
+#else
 	val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
+#endif
+
 	debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
 		dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
 	return val;
@@ -696,6 +718,7 @@ void ide_init (void)
 		ide_dev_desc[i].blksz=0;
 		ide_dev_desc[i].lba=0;
 		ide_dev_desc[i].block_read=ide_read;
+		ide_dev_desc[i].block_write = ide_write;
 		if (!ide_bus_ok[IDE_BUS(i)])
 			continue;
 		ide_led (led, 1);		/* LED on	*/
@@ -902,7 +925,13 @@ output_data(int dev, ulong *sect_buf, int words)
 static void
 output_data(int dev, ulong *sect_buf, int words)
 {
-	outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
+#if defined(CONFIG_IDE_AHB)
+	extern void ide_write_data(int, ulong *, int);
+
+	ide_write_data(dev, sect_buf, words);
+#else
+	outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
+#endif
 }
 #endif	/* CONFIG_IDE_SWAP_IO */
 
@@ -960,7 +989,13 @@ input_data(int dev, ulong *sect_buf, int words)
 static void
 input_data(int dev, ulong *sect_buf, int words)
 {
+#if defined(CONFIG_IDE_AHB)
+	extern void ide_read_data(int, ulong *, int);
+
+	ide_read_data(dev, sect_buf, words);
+#else
 	insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
+#endif
 }
 
 #endif	/* CONFIG_IDE_SWAP_IO */
-- 
1.7.3.5