[U-Boot] POST Problems on MPC8[5/6]xx

Kumar Gala galak at kernel.crashing.org
Thu Jan 27 04:28:24 CET 2011


On Jan 26, 2011, at 4:03 PM, John Schmoller wrote:

> Hello all,
> 
> I'm seeing issues on our MPC8[5/6]xx products in relation to POST
> testing.  I see that the POST word is stored in a spare, unused register
> in the PIC, but this register seems to be cleared during
> interrupt_init() when the PIC is reset.  This means that I am seeing the
> POST_ROM tests run (pre interrupt_init()) but the word then gets blown
> away and the POST_RAM tests do not run (post interrupt_init()).  I
> browsed through the MPC8572 UM and didn't see any obvious replacements
> for TFRR that wouldn't be reset.  Do others see this issue?  Freescale
> guys, are you aware of some other register we can use?
> 
> Thanks,
> John  

Not really, probably best to just have the PIC code save & restore the TFRR if #define CONFIG_POST

- k


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