[U-Boot] [PATCH 3/3] powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E
Kumar Gala
galak at kernel.crashing.org
Wed Jul 27 04:58:03 CEST 2011
On Jul 21, 2011, at 12:20 AM, Kumar Gala wrote:
> The P2040/P2040E have no L2 cache. So we utilize the SVR to determine
> if we are one of these devices and skip the L2 init code in cpu_init.c
> and release. For the device tree we skip the updating of the L2 cache
> properties but we still update the chain of caches so the CPC/L3 node
> can be properly updated.
>
> Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
> ---
> arch/powerpc/cpu/mpc85xx/cpu_init.c | 7 +++++++
> arch/powerpc/cpu/mpc85xx/fdt.c | 23 +++++++++++++++--------
> arch/powerpc/cpu/mpc85xx/release.S | 15 ++++++++++++++-
> 3 files changed, 36 insertions(+), 9 deletions(-)
applied to 85xx
- k
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