[U-Boot] [PATCH V6 1/5] omap3: Configure RAM bank 0 if in SPL

[Simon Schwarz]

Hi Aneesh,

On 07/28/2011 10:50 AM, Aneesh V wrote:
> Hi Simon,
>
> First of all sorry for giving my first comments on v6. But I didn't
> have mail access for the last couple of days.
>
> On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
>> OMAP3 relied on the memory config done by X-loader or Configuration
>> Header. This
>> has to be reworked for the implementation of a SPL. This patch
>> configures RAM
>> bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by
>> devkit8000
>> are added to mem.h
>>
>> Signed-off-by: Simon Schwarz<simonschwarzcor at gmail.com>
>> ---
>> V1 changes:
>> ADD Settings for Micron RAM
>>
>> V2 changes:
>> DEL spl_debug outputs if mem test fails/passes
>> CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
>>
>> V3 changes:
>> nothing
>>
>> V4 changes:
>> nothing
>>
>> V5 changes:
>> nothing
>>
>> V6 changes:
>> nothing
>>
>> Transition from V1 to V2 also includes that this patch is now based on
>> - the new SPL layout by Aneesh V and Daniel Schwierzeck
>> - the OMAP4 SPL patches by Aneesh V
>>
>> This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
>> configuration independent of x-loader or CH"
>> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)
>> ---
>> arch/arm/cpu/armv7/omap3/sdrc.c | 30 ++++++++++++++++++++++++++-
>> arch/arm/include/asm/arch-omap3/mem.h | 36
>> +++++++++++++++++++++++++++++++++
>> 2 files changed, 65 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c
>> b/arch/arm/cpu/armv7/omap3/sdrc.c
>> index 2a7970b..dac14d0 100644
>> --- a/arch/arm/cpu/armv7/omap3/sdrc.c
>> +++ b/arch/arm/cpu/armv7/omap3/sdrc.c
>> @@ -8,6 +8,9 @@
>> * Copyright (C) 2004-2010
>> * Texas Instruments Incorporated - http://www.ti.com/
>> *
>> + * Copyright (C) 2011
>> + * Corscience GmbH& Co. KG - Simon Schwarz<schwarz at corscience.de>
>> + *
>> * Author :
>> * Vaibhav Hiremath<hvaibhav at ti.com>
>> *
>> @@ -133,13 +136,38 @@ void do_sdrc_init(u32 cs, u32 early)
>> sdelay(0x20000);
>> }
>>
>> +#ifdef CONFIG_SPL_BUILD
>
> Is this really specific to SPL. mem_init() should ideally be the same
> for SPL and NOR u-boot, right? Maybe you could remove the #ifdef?

> I think NOR boot is broken on OMAP3(somebody please correct me if I am
> wrong). I think this may be one thing that helps to make it work again.

I did this to not influence non-SPL code. But you are right since 
mem_init isn't called if it is already in RAM I can remove the #ifdefs 
-> will do in V7.

>> + /* If we use a SPL there is no x-loader nor config header so we have
>> + * to do the job ourselfs
>> + */
>> + if (cs == CS0) {
>> + sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
>> +
>> + /* General SDRC config */
>> + writel(V_MCFG,&sdrc_base->cs[cs].mcfg);
>> + writel(V_RFR_CTRL,&sdrc_base->cs[cs].rfr_ctrl);
>> +
>> + /* AC timings */
>> + writel(V_ACTIMA_165,&sdrc_actim_base0->ctrla);
>> + writel(V_ACTIMB_165,&sdrc_actim_base0->ctrlb);
>> +
>> + /* Initialize */
>> + writel(CMD_NOP,&sdrc_base->cs[cs].manual);
>> + writel(CMD_PRECHARGE,&sdrc_base->cs[cs].manual);
>> + writel(CMD_AUTOREFRESH,&sdrc_base->cs[cs].manual);
>> + writel(CMD_AUTOREFRESH,&sdrc_base->cs[cs].manual);
>> +
>> + writel(V_MR,&sdrc_base->cs[cs].mr);
>> + }
>> +#endif /* CONFIG_SPL_BUILD */
>
>
> best regards,
> Aneesh

Regards, thanks for review!
Simon