[U-Boot] at91sam9260ek and mmc

Jan Pohanka xhpohanka at gmail.com
Wed Jun 1 07:29:22 CEST 2011


Hi Joey,

2011/5/31 Joey Oravec <joravec at drewtech.com>:
> Hi -
>
> I don't know about the dataflash question, but search back on the mailing
> lists for a few of my threads about mmc/sd. We ship a few sam9261 based
> products and the controller has issues. If mmc/sd is critical to your
> product you should try to replicate those tests.
>
I will check it, thanks.

> The 9260 is ancient. For new designs you may want to look at a newer chip.
> There are even pin compatible replacements for the 9260.

Yes, my custom board is based on sam9g20 chip, but I tried u-boot on
9260ek first, because it was the only development board available for
me and supported by u-boot.

Now I have u-boot running on my board with mmc on port b, but it does
not work yet, maybe I will success today...

regards
Jan

>
> -joey
>
> On 5/30/2011 4:34 AM, Jan Pohanka wrote:
>>
>> Hello,
>> I'm trying to get u-boot 2010.12 working on at91sam9260ek devkit with
>> mmc support. I have read several discussions here and followed the
>> steps described in README.atmel-mci. (my config and board file are
>> below...)
>> There are two issues I'm facing.
>>
>> The first one: When I enable mmc support, the dataflash stops to work.
>> According to info from boot process, dataflash is detected correctly,
>> but no data can be read (environment) or written.
>>
>> RAM Configuration:
>> Bank #0: 20000000 64 MiB
>> NAND:  256 MiB
>> DataFlash:AT45DB642
>> Nb pages:   8192
>> Page Size:   1056
>> Size= 8650752 bytes
>> Logical address: 0xD0000000
>> Area 0: D0000000 to D00041FF (RO) Bootstrap
>> Area 1: D0004200 to D00083FF      Environment
>> Area 2: D0008400 to D0041FFF (RO) U-Boot
>> Area 3: D0042000 to D0251FFF      Kernel
>> Area 4: D0252000 to D083FFFF      FS
>> MMC:   mci: 0
>> *** Warning - bad CRC, using default environment
>>
>> The second one: fatls command causes u-boot to freeze with following
>> message
>> U-Boot>  mmc list
>> mci: 0
>> U-Boot>  mmc rescan 0
>> mci: setting clock 194000 Hz, block size 512
>> mci: setting clock 24832000 Hz, block size 512
>> mci: setting clock 194000 Hz, block size 512
>> mci: setting clock 194000 Hz, block size 512
>> mci: setting clock 24832000 Hz, block size 512
>> U-Boot>  mmc part 0
>> mci: setting clock 194000 Hz, block size 512
>> mci: setting clock 24832000 Hz, block size 512
>> mci: setting clock 194000 Hz, block size 512
>> mci: setting clock 194000 Hz, block size 512
>> mci: setting clock 24832000 Hz, block size 512
>>
>> Partition Map for MMC device 0  --   Partition Type: DOS
>>
>> Partition     Start Sector     Num Sectors     Type
>>     1                    1          583679       e
>> U-Boot>  fatinfo mmc 0:1
>> Interface:  MMC
>>   Device 0: Vendor: Man 035344 Snr 413f90a9 Rev: 8.0 Prod: SU02G
>>             Type: Removable Hard Disk
>>             Capacity: 1886.0 MB = 1.8 GB (3862528 x 512)
>> Partition 1: Filesystem: FAT16 "           "
>>
>> U-Boot>  fatls mmc 0:1
>> gen_atmel_mci: CMDR 000d1052 (18) ARGR 00026200 (SR: 0000c0d7) XFER
>> DTIP never unset, ignoring
>>
>> I'm a newbie with u-boot, could please someone give me any hints where
>> to start to make this working?
>>
>> best regards
>> Jan
>>
>> /*
>>  * (C) Copyright 2007-2008
>>  * Stelian Pop<stelian.pop at leadtechdesign.com>
>>  * Lead Tech Design<www.leadtechdesign.com>
>>  *
>>  * Configuation settings for the AT91SAM9260EK&  AT91SAM9G20EK boards.
>>  *
>>  * See file CREDITS for list of people who contributed to this
>>  * project.
>>  *
>>  * This program is free software; you can redistribute it and/or
>>  * modify it under the terms of the GNU General Public License as
>>  * published by the Free Software Foundation; either version 2 of
>>  * the License, or (at your option) any later version.
>>  *
>>  * This program is distributed in the hope that it will be useful,
>>  * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>  * GNU General Public License for more details.
>>  *
>>  * You should have received a copy of the GNU General Public License
>>  * along with this program; if not, write to the Free Software
>>  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>>  * MA 02111-1307 USA
>>  */
>>
>> #ifndef __CONFIG_H
>> #define __CONFIG_H
>>
>>
>> #define CONFIG_AT91_LEGACY
>>
>> /*
>>  * WARNING:
>>  * The initial boot program needs to be adapted such that it loads U-boot
>>  * at the provided TEXT_BASE below. Note that the Atmel AT91-bootstrap
>> loader
>>  * might be configured such that it loads U-boot at 0x23f00000. But since
>>  * U-boot is now being relocated to the end of RAM, this will result in a
>>  * lockup during boot due to an overlap in the BSS segment. So, we choose
>> a
>>  * safe load adress to begin with, namely 0x20a00000
>>  */
>> #define CONFIG_SYS_TEXT_BASE    0x20a00000
>>
>>
>> /* ARM asynchronous clock */
>> #define CONFIG_SYS_AT91_SLOW_CLOCK  32768    /* slow clock xtal */
>> #define CONFIG_SYS_AT91_MAIN_CLOCK  18432000  /* main clock xtal */
>> #define CONFIG_SYS_HZ      1000
>>
>> #define CONFIG_ARM926EJS  1  /* This is an ARM926EJS Core  */
>>
>> #ifdef CONFIG_AT91SAM9G20EK
>> #define CONFIG_AT91SAM9G20  1  /* It's an Atmel AT91SAM9G20 SoC*/
>> #else
>> #define CONFIG_AT91SAM9260  1  /* It's an Atmel AT91SAM9260 SoC*/
>> #endif
>>
>> #define CONFIG_AT91FAMILY
>>
>> #define CONFIG_ARCH_CPU_INIT
>> #undef CONFIG_USE_IRQ      /* we don't need IRQ/FIQ stuff  */
>>
>> #define CONFIG_CMDLINE_TAG    /* enable passing of ATAGs */
>> #define CONFIG_SETUP_MEMORY_TAGS
>> #define CONFIG_INITRD_TAG
>>
>> #define CONFIG_SKIP_LOWLEVEL_INIT
>>
>> /* general purpose I/O */
>> #define CONFIG_AT91_GPIO
>>
>>
>> /* serial console */
>> #define CONFIG_ATMEL_USART
>> #undef CONFIG_USART0
>> #undef CONFIG_USART1
>> #undef CONFIG_USART2
>> #define CONFIG_USART3    1  /* USART 3 is DBGU */
>> #define CONFIG_BAUDRATE      115200
>> #define CONFIG_SYS_BAUDRATE_TABLE  {115200 , 19200, 38400, 57600, 9600 }
>>
>> /* SD/MMC card */
>> #define CONFIG_MMC              1
>> #define CONFIG_GENERIC_MMC      1
>> #define CONFIG_GENERIC_ATMEL_MCI    1
>> #define CONFIG_ATMEL_MCI_PORTB      1
>> /*#define CONFIG_SYS_MMC_CD_PIN       AT91_PIN_PC9*/
>> #define CONFIG_CMD_MMC              1
>>
>>
>> /* LED */
>> #define CONFIG_AT91_LED
>> #define  CONFIG_RED_LED    AT91_PIN_PA9  /* this is the power led */
>> #define  CONFIG_GREEN_LED  AT91_PIN_PA6  /* this is the user led */
>>
>> #define CONFIG_BOOTDELAY  3
>>
>> /*
>>  * BOOTP options
>>  */
>> #define CONFIG_BOOTP_BOOTFILESIZE  1
>> #define CONFIG_BOOTP_BOOTPATH    1
>> #define CONFIG_BOOTP_GATEWAY    1
>> #define CONFIG_BOOTP_HOSTNAME    1
>>
>> /*
>>  * Command line configuration.
>>  */
>> #include<config_cmd_default.h>
>> #undef CONFIG_CMD_BDI
>> #undef CONFIG_CMD_FPGA
>> #undef CONFIG_CMD_IMI
>> #undef CONFIG_CMD_IMLS
>> #undef CONFIG_CMD_LOADS
>> #undef CONFIG_CMD_SOURCE
>>
>> #define CONFIG_CMD_PING    1
>> #define CONFIG_CMD_DHCP    1
>> #define CONFIG_CMD_NAND    1
>> #define CONFIG_CMD_USB    1
>> #define CONFIG_CMD_CACHE    1
>>
>> /* SDRAM */
>> #define CONFIG_NR_DRAM_BANKS    1
>> #define CONFIG_SYS_SDRAM_BASE   0x20000000
>> #define CONFIG_SYS_SDRAM_SIZE   0x04000000 /* 64 megs */
>>
>> /* size in bytes reserved for initial data */
>> #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x1000 \
>>                                      - GENERATED_GBL_DATA_SIZE)
>>
>>
>> /* DataFlash */
>> #define CONFIG_ATMEL_DATAFLASH_SPI
>> #define CONFIG_HAS_DATAFLASH    1
>> #define CONFIG_SYS_SPI_WRITE_TOUT    (5*CONFIG_SYS_HZ)
>> #define CONFIG_SYS_MAX_DATAFLASH_BANKS    2
>> #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0  0xC0000000  /* CS0 */
>> #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1  0xD0000000  /* CS1 */
>> #define AT91_SPI_CLK      15000000
>>
>> #ifdef CONFIG_AT91SAM9G20EK
>> #define DATAFLASH_TCSS      (0x22<<  16)
>> #else
>> #define DATAFLASH_TCSS      (0x1a<<  16)
>> #endif
>> #define DATAFLASH_TCHS      (0x1<<  24)
>>
>> /* NAND flash */
>> #ifdef CONFIG_CMD_NAND
>> #define CONFIG_NAND_ATMEL
>> #define CONFIG_SYS_MAX_NAND_DEVICE      1
>> #define CONFIG_SYS_NAND_BASE            0x40000000
>> #define CONFIG_SYS_NAND_DBW_8
>> #define CONFIG_SYS_NAND_MASK_ALE        (1<<  21)
>> #define CONFIG_SYS_NAND_MASK_CLE        (1<<  22)
>> #define CONFIG_SYS_NAND_ENABLE_PIN      AT91_PIN_PC14
>> #define CONFIG_SYS_NAND_READY_PIN       AT91_PIN_PC13
>>
>> #endif
>>
>> /* NOR flash - no real flash on this board */
>> #define CONFIG_SYS_NO_FLASH      1
>>
>> /* Ethernet */
>> #define CONFIG_MACB      1
>> #define CONFIG_RMII      1
>> #define CONFIG_NET_MULTI    1
>> #define CONFIG_NET_RETRY_COUNT    20
>> #define CONFIG_RESET_PHY_R    1
>>
>> /* USB */
>> #define CONFIG_USB_ATMEL
>> #define CONFIG_USB_OHCI_NEW    1
>> #define CONFIG_DOS_PARTITION    1
>> #define CONFIG_SYS_USB_OHCI_CPU_INIT    1
>> #define CONFIG_SYS_USB_OHCI_REGS_BASE    0x00500000  /*
>> AT91SAM9260_UHP_BASE */
>> #define CONFIG_SYS_USB_OHCI_SLOT_NAME    "at91sam9260"
>> #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS  2
>> #define CONFIG_USB_STORAGE    1
>> #define CONFIG_CMD_FAT      1
>>
>> #define CONFIG_SYS_LOAD_ADDR      0x22000000  /* load address */
>>
>> #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
>> #define CONFIG_SYS_MEMTEST_END          0x23e00000
>>
>> #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
>>
>> /* bootstrap + u-boot + env + linux in dataflash on CS0 */
>> #define CONFIG_ENV_IS_IN_DATAFLASH  1
>> #define CONFIG_SYS_MONITOR_BASE  (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 +
>> 0x8400)
>> #define CONFIG_ENV_OFFSET    0x4200
>> #define CONFIG_ENV_ADDR    (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 +
>> CONFIG_ENV_OFFSET)
>> #define CONFIG_ENV_SIZE    0x4200
>> #define CONFIG_BOOTCOMMAND  "cp.b 0xC0042000 0x22000000 0x210000; bootm"
>> #define CONFIG_BOOTARGS    "console=ttyS0,115200 "      \
>>         "root=/dev/mtdblock0 "      \
>>         "mtdparts=atmel_nand:-(root) "    \
>>         "rw rootfstype=jffs2"
>>
>> #elif CONFIG_SYS_USE_DATAFLASH_CS1
>>
>> /* bootstrap + u-boot + env + linux in dataflash on CS1 */
>> #define CONFIG_ENV_IS_IN_DATAFLASH  1
>> #define CONFIG_SYS_MONITOR_BASE  (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 +
>> 0x8400)
>> #define CONFIG_ENV_OFFSET    0x4200
>> #define CONFIG_ENV_ADDR    (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 +
>> CONFIG_ENV_OFFSET)
>> #define CONFIG_ENV_SIZE    0x4200
>> #define CONFIG_BOOTCOMMAND  "cp.b 0xD0042000 0x22000000 0x210000; bootm"
>> #define CONFIG_BOOTARGS    "console=ttyS0,115200 "      \
>>         "root=/dev/mtdblock0 "      \
>>         "mtdparts=atmel_nand:-(root) "    \
>>         "rw rootfstype=jffs2"
>>
>> #else /* CONFIG_SYS_USE_NANDFLASH */
>>
>> /* bootstrap + u-boot + env + linux in nandflash */
>> #define CONFIG_ENV_IS_IN_NAND  1
>> #define CONFIG_ENV_OFFSET    0x60000
>> #define CONFIG_ENV_OFFSET_REDUND  0x80000
>> #define CONFIG_ENV_SIZE    0x20000    /* 1 sector = 128 kB */
>> #define CONFIG_BOOTCOMMAND  "nand read 0x22000000 0xA0000 0x200000; bootm"
>> #define CONFIG_BOOTARGS    "console=ttyS0,115200 "      \
>>         "root=/dev/mtdblock5 "      \
>>         "mtdparts=atmel_nand:128k(bootstrap)ro,"  \
>>         "256k(uboot)ro,128k(env1)ro,"    \
>>         "128k(env2)ro,2M(linux),-(root) "  \
>>         "rw rootfstype=jffs2"
>>
>> #endif
>>
>>
>> #define CONFIG_SYS_PROMPT    "U-Boot>  "
>> #define CONFIG_SYS_CBSIZE    256
>> #define CONFIG_SYS_MAXARGS    16
>> #define CONFIG_SYS_PBSIZE    (CONFIG_SYS_CBSIZE +
>> sizeof(CONFIG_SYS_PROMPT) + 16)
>> #define CONFIG_SYS_LONGHELP    1
>> #define CONFIG_CMDLINE_EDITING  1
>>
>> /*
>>  * Size of malloc() pool
>>  */
>> #define CONFIG_SYS_MALLOC_LEN    ROUND(3 * CONFIG_ENV_SIZE + 128*1024,
>> 0x1000)
>>
>> #define CONFIG_STACKSIZE  (32*1024)  /* regular stack */
>>
>> #ifdef CONFIG_USE_IRQ
>> #error CONFIG_USE_IRQ not supported
>> #endif
>>
>> #endif
>>
>>
>>
>> /*
>>  * (C) Copyright 2007-2008
>>  * Stelian Pop<stelian.pop at leadtechdesign.com>
>>  * Lead Tech Design<www.leadtechdesign.com>
>>  *
>>  * See file CREDITS for list of people who contributed to this
>>  * project.
>>  *
>>  * This program is free software; you can redistribute it and/or
>>  * modify it under the terms of the GNU General Public License as
>>  * published by the Free Software Foundation; either version 2 of
>>  * the License, or (at your option) any later version.
>>  *
>>  * This program is distributed in the hope that it will be useful,
>>  * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>  * GNU General Public License for more details.
>>  *
>>  * You should have received a copy of the GNU General Public License
>>  * along with this program; if not, write to the Free Software
>>  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>>  * MA 02111-1307 USA
>>  */
>>
>> #include<common.h>
>> #include<asm/arch/at91sam9260.h>
>> #include<asm/arch/at91sam9260_matrix.h>
>> #include<asm/arch/at91sam9_smc.h>
>> #include<asm/arch/at91_common.h>
>> #include<asm/arch/at91_pmc.h>
>> #include<asm/arch/at91_rstc.h>
>> #include<asm/arch/gpio.h>
>> #include<asm/arch/io.h>
>> #include<asm/arch/hardware.h>
>> #if defined(CONFIG_RESET_PHY_R)&&  defined(CONFIG_MACB)
>> # include<net.h>
>> #endif
>> #include<netdev.h>
>> #ifdef CONFIG_GENERIC_ATMEL_MCI
>> # include<mmc.h>
>> #endif
>>
>> #define DEBUG
>>
>> DECLARE_GLOBAL_DATA_PTR;
>>
>> /*
>> ------------------------------------------------------------------------- */
>> /*
>>  * Miscelaneous platform dependent initialisations
>>  */
>>
>> #ifdef CONFIG_CMD_NAND
>> static void at91sam9260ek_nand_hw_init(void)
>> {
>>        unsigned long csa;
>>
>>        /* Enable CS3 */
>>        csa = at91_sys_read(AT91_MATRIX_EBICSA);
>>        at91_sys_write(AT91_MATRIX_EBICSA,
>>                       csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
>>
>>        /* Configure SMC CS3 for NAND/SmartMedia */
>>        at91_sys_write(AT91_SMC_SETUP(3),
>>                       AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
>>                       AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
>>        at91_sys_write(AT91_SMC_PULSE(3),
>>                       AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
>>                       AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
>>        at91_sys_write(AT91_SMC_CYCLE(3),
>>                       AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
>>        at91_sys_write(AT91_SMC_MODE(3),
>>                       AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
>>                       AT91_SMC_EXNWMODE_DISABLE |
>> #ifdef CONFIG_SYS_NAND_DBW_16
>>                       AT91_SMC_DBW_16 |
>> #else /* CONFIG_SYS_NAND_DBW_8 */
>>                       AT91_SMC_DBW_8 |
>> #endif
>>                       AT91_SMC_TDF_(2));
>>
>>        at91_sys_write(AT91_PMC_PCER, 1<<  AT91SAM9260_ID_PIOC);
>>
>>        /* Configure RDY/BSY */
>>        at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
>>
>>        /* Enable NandFlash */
>>        at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
>> }
>> #endif
>>
>> #ifdef CONFIG_MACB
>> static void at91sam9260ek_macb_hw_init(void)
>> {
>>        unsigned long rstc;
>>
>>        /* Enable clock */
>>        at91_sys_write(AT91_PMC_PCER, 1<<  AT91SAM9260_ID_EMAC);
>>
>>        /*
>>         * Disable pull-up on:
>>         *      RXDV (PA17) =>  PHY normal mode (not Test mode)
>>         *      ERX0 (PA14) =>  PHY ADDR0
>>         *      ERX1 (PA15) =>  PHY ADDR1
>>         *      ERX2 (PA25) =>  PHY ADDR2
>>         *      ERX3 (PA26) =>  PHY ADDR3
>>         *      ECRS (PA28) =>  PHY ADDR4  =>  PHYADDR = 0x0
>>         *
>>         * PHY has internal pull-down
>>         */
>>        writel(pin_to_mask(AT91_PIN_PA14) |
>>               pin_to_mask(AT91_PIN_PA15) |
>>               pin_to_mask(AT91_PIN_PA17) |
>>               pin_to_mask(AT91_PIN_PA25) |
>>               pin_to_mask(AT91_PIN_PA26) |
>>               pin_to_mask(AT91_PIN_PA28),
>>               pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
>>
>>        rstc = at91_sys_read(AT91_RSTC_MR)&  AT91_RSTC_ERSTL;
>>
>>        /* Need to reset PHY ->  500ms reset */
>>        at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
>>                                     (AT91_RSTC_ERSTL&  (0x0D<<  8)) |
>>                                     AT91_RSTC_URSTEN);
>>
>>        at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
>>
>>        /* Wait for end hardware reset */
>>        while (!(at91_sys_read(AT91_RSTC_SR)&  AT91_RSTC_NRSTL));
>>
>>        /* Restore NRST value */
>>        at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
>>                                     (rstc) |
>>                                     AT91_RSTC_URSTEN);
>>
>>        /* Re-enable pull-up */
>>        writel(pin_to_mask(AT91_PIN_PA14) |
>>               pin_to_mask(AT91_PIN_PA15) |
>>               pin_to_mask(AT91_PIN_PA17) |
>>               pin_to_mask(AT91_PIN_PA25) |
>>               pin_to_mask(AT91_PIN_PA26) |
>>               pin_to_mask(AT91_PIN_PA28),
>>               pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
>>
>>        at91_macb_hw_init();
>> }
>> #endif
>>
>> int board_init(void)
>> {
>>        /* Enable Ctrlc */
>>        console_init_f();
>>
>> #ifdef CONFIG_AT91SAM9G20EK
>>        /* arch number of AT91SAM9260EK-Board */
>>        gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK;
>> #else
>>        /* arch number of AT91SAM9260EK-Board */
>>        gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK;
>> #endif
>>        /* adress of boot parameters */
>>        gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
>>
>>        at91_serial_hw_init();
>> #ifdef CONFIG_CMD_NAND
>>        at91sam9260ek_nand_hw_init();
>> #endif
>> #ifdef CONFIG_HAS_DATAFLASH
>>        at91_spi0_hw_init((1<<  0) | (1<<  1));
>> #endif
>> #ifdef CONFIG_MACB
>>        at91sam9260ek_macb_hw_init();
>> #endif
>>
>>        return 0;
>> }
>>
>> int dram_init(void)
>> {
>>     /* dram_init must store complete ramsize in gd->ram_size */
>>     gd->ram_size = get_ram_size((volatile long
>> *)CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE);
>>        return 0;
>> }
>>
>> #ifdef CONFIG_RESET_PHY_R
>> void reset_phy(void)
>> {
>> }
>> #endif
>>
>> int board_eth_init(bd_t *bis)
>> {
>>        int rc = 0;
>> #ifdef CONFIG_MACB
>>        rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x00);
>> #endif
>>        return rc;
>> }
>>
>>
>> #ifdef CONFIG_GENERIC_ATMEL_MCI
>> /* this is a weak define that we are overriding */
>> int board_mmc_init(bd_t *bd)
>> {
>>        /* Enable clock */
>>        at91_sys_write(AT91_PMC_PCER, 1<<  AT91SAM9260_ID_MCI);
>>        at91_mci_hw_init();
>>
>>        /* This calls the atmel_mci_init in gen_atmel_mci.c */
>>        return atmel_mci_init((void *)AT91_BASE_MCI);
>> }
>>
>> /* this is a weak define that we are overriding */
>> int board_mmc_getcd(u8 *cd, struct mmc *mmc)
>> {
>>        /*
>>         * the only currently existing use of this function
>>         * (fsl_esdhc.c) suggests this function must return
>>         * *cs = TRUE if a card is NOT detected ->  in most
>>         * cases the value of the pin when the detect switch
>>         * closes to GND
>>         */
>>        //*cd = at91_get_gpio_value (CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
>>        *cd = 1; // there's no CD pin connected
>>        return 0;
>> }
>>
>> #endif
>> _______________________________________________
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