[U-Boot] [5/5]devkit8000 nand_spl: add nand_spl support
simonschwarzcor at googlemail.com
simonschwarzcor at googlemail.com
Tue Jun 28 16:14:40 CEST 2011
Adds the board config for devkit8000 nand_spl. Adds SPL specific defines to board configuration. Adds the nand_spl Makefile for devkit8000. Adds the main spl implementation to nand_spl including early console init. Adds nand_spl linker script.
Signed-off-by: Simon Schwarz <schwarz at corscience.de>
--
diff --git a/boards.cfg b/boards.cfg
index dfefc3f..bdc4136 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -74,15 +74,6 @@ omap1510inn arm arm925t - ti
aspenite arm arm926ejs - Marvell armada100
afeb9260 arm arm926ejs - - at91
at91cap9adk arm arm926ejs - atmel at91
-at91sam9260ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_NANDFLASH
-at91sam9260ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS0
-at91sam9260ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS1
-at91sam9g20ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_NANDFLASH
-at91sam9g20ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS0
-at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS1
-at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH
-at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0
-at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1
snapper9260 arm arm926ejs - bluewater at91 snapper9260:AT91SAM9260
snapper9g20 arm arm926ejs snapper9260 bluewater at91 snapper9260:AT91SAM9G20
cpu9260 arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260
@@ -117,7 +108,7 @@ davinci_sffsdr arm arm926ejs sffsdr davinci
davinci_sonata arm arm926ejs sonata davinci davinci
suen3 arm arm926ejs km_arm keymile kirkwood
suen8 arm arm926ejs km_arm keymile kirkwood
-mgcoge3un arm arm926ejs km_arm keymile kirkwood
+mgcoge2un arm arm926ejs km_arm keymile kirkwood
guruplug arm arm926ejs - Marvell kirkwood
mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood
openrd_base arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_BASE
@@ -135,12 +126,10 @@ omap5912osk arm arm926ejs - ti
edminiv2 arm arm926ejs - LaCie orion5x
dkb arm arm926ejs - Marvell pantheon
ca9x4_ct_vxp arm armv7 vexpress armltd
-efikamx arm armv7 efikamx - mx5 mx51evk:IMX_CONFIG=board/efikamx/imximage.cfg
+efikamx arm armv7 efikamx - mx5
mx51evk arm armv7 mx51evk freescale mx5 mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg
mx53evk arm armv7 mx53evk freescale mx5 mx53evk:IMX_CONFIG=board/freescale/mx53evk/imximage.cfg
-mx53loco arm armv7 mx53loco freescale mx5 mx53loco:IMX_CONFIG=board/freescale/mx53loco/imximage.cfg
-mx53smd arm armv7 mx53smd freescale mx5 mx53smd:IMX_CONFIG=board/freescale/mx53smd/imximage.cfg
-vision2 arm armv7 vision2 ttcontrol mx5 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg
+vision2 arm armv7 vision2 ttcontrol mx5
cm_t35 arm armv7 cm_t35 - omap3
omap3_overo arm armv7 overo - omap3
omap3_pandora arm armv7 pandora - omap3
@@ -155,25 +144,20 @@ omap3_beagle arm armv7 beagle ti
omap3_evm arm armv7 evm ti omap3
omap3_sdp3430 arm armv7 sdp3430 ti omap3
devkit8000 arm armv7 devkit8000 timll omap3
+devkit8000_nand arm armv7 devkit8000 timll omap3 devkit8000:NAND_U_BOOT
omap4_panda arm armv7 panda ti omap4
omap4_sdp4430 arm armv7 sdp4430 ti omap4
s5p_goni arm armv7 goni samsung s5pc1xx
smdkc100 arm armv7 smdkc100 samsung s5pc1xx
s5pc210_universal arm armv7 universal_c210 samsung s5pc2xx
-smdkv310 arm armv7 smdkv310 samsung s5pc2xx
harmony arm armv7 harmony nvidia tegra2
seaboard arm armv7 seaboard nvidia tegra2
-u8500_href arm armv7 u8500 st-ericsson u8500
-actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2
-actux1_8_16 arm ixp actux1 - - actux1:FLASH1X8
-actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB
-actux1_8_32 arm ixp actux1 - - actux1:FLASH1X8,RAM_32MB
+actux1 arm ixp
actux2 arm ixp
actux3 arm ixp
actux4 arm ixp
-dvlhost arm ixp
ixdp425 arm ixp
-ixdpg425 arm ixp ixdp425
+ixdpg425 arm ixp
lpd7a400 arm lh7a40x lpd7a40x
lpd7a404 arm lh7a40x lpd7a40x
balloon3 arm pxa
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 125c690..b3e8d6e 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -44,7 +44,6 @@
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <asm/arch/omap3.h>
-
/* Display CPU and Board information */
#define CONFIG_DISPLAY_CPUINFO 1
#define CONFIG_DISPLAY_BOARDINFO 1
@@ -68,6 +67,16 @@
/* Sector */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SYS_SPL_TEXT_BASE CONFIG_SYS_SRAM_START
+#define CONFIG_SYS_SPL_MAX_SIZE 0x7800 /* 30 K */
+#define CONFIG_SYS_SPL_STACK LOW_LEVEL_SRAM_STACK
+
+/* SRAM config */
+#define CONFIG_SYS_SRAM_START 0x40200000
+#define CONFIG_SYS_SRAM_SIZE 0xFFFF /*64 kB*/
+
/* Hardware drivers */
/* DDR - I use Micron DDR */
@@ -132,6 +141,7 @@
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
/* to access nand at */
/* CS0 */
+
#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
@@ -144,6 +154,29 @@
#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
/* partition */
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+
+#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
+ CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
+ CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 /* Adjust for speed */
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+
/* commands to include */
#include <config_cmd_default.h>
@@ -282,9 +315,9 @@
#endif
/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE (128 << 20) /* at least 128 MiB */
+#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) /* at least 128 MiB */
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
/* SDRAM Bank Allocation method */
diff --git a/nand_spl/board/timll/devkit8000/Makefile b/nand_spl/board/timll/devkit8000/Makefile
new file mode 100644
index 0000000..981038b
--- /dev/null
+++ b/nand_spl/board/timll/devkit8000/Makefile
@@ -0,0 +1,274 @@
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# (C) Copyright 2009
+# Frederik Kriewitz <frederik at kriewitz.eu>
+#
+# (C) Copyright 2011
+# Corscience GmbH & Co. KG - Simon Schwarz <schwarz at corscience.de>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+splobj = $(OBJTREE)/nand_spl/
+
+#This replaces the variables with defines from the config file
+LDSCRIPT_SOURCE = $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDSCRIPT = $(splobj)u-boot-spl-generated.lds
+LDPPFLAGS += -include $(TOPDIR)/include/config.h
+${LDSCRIPT}: ${LDSCRIPT_SOURCE}
+ $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
+
+LDFLAGS += -Bstatic -T $(LDSCRIPT) $(PLATFORM_LDFLAGS) --gc-sections
+
+SOBJS := start.o lowlevel_init.o cache.o reset.o
+
+COBJS := ns16550.o devkit8000.o clock.o mem.o sdrc.o \
+ syslib.o eabi_compat.o vsprintf.o \
+ stdio.o dlmalloc.o string.o console.o ctype.o div64.o \
+ div0.o gpio.o serial.o \
+ spl-devkit8000.o sys_info.o time.o omap24xx_i2c.o \
+ timer.o board.o nand_util.o nand.o omap_gpmc.o \
+ lib_reset.o nand_boot.o nand_base.o
+
+AFLAGS += -DCONFIG_PRELOADER -DDEBUG
+CFLAGS += -DCONFIG_PRELOADER -ffunction-sections -fdata-sections \
+ -march=armv5 -DDEBUG -fno-short-enums
+
+PLATFORM_LIBGCC = -L $(shell dirname `$(CC) $(CFLAGS) \
+ -print-libgcc-file-name`) -lgcc
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS)) $(addprefix $(obj), $(SOBJS))
+__OBJS := $(COBJS) $(SOBJS)
+LNDIR := $(splobj)board/$(BOARDDIR)
+
+#ALL = $(splobj)u-boot-nand $(splobj)u-boot-nand.bin
+
+### targets
+ALL = $(splobj)u-boot-spl $(splobj)u-boot-spl.bin $(splobj)u-boot-spl-16k.bin
+all: $(obj).depend $(ALL)
+
+$(splobj)u-boot-spl: $(OBJS) $(LDSCRIPT)
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(OBJS) \
+ $(PLATFORM_LIBGCC) \
+ -Map $(splobj)u-boot-spl.map \
+ -o $(splobj)u-boot-spl
+
+#XXX: not really needed for devkit
+$(splobj)u-boot-spl-16k.bin: $(splobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+
+$(splobj)u-boot-spl.bin: $(splobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(splobj)u-boot.lds: $(LDSCRIPT)
+ $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
+
+$(obj)%.o: $(obj)%.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o: $(obj)%.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+clean:
+ rm -f $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+### Link-in targets
+$(obj)start.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/start.S $@
+
+$(obj)board.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/board.c $@
+
+$(obj)lowlevel_init.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/lowlevel_init.S $@
+
+$(obj)devkit8000.c: $(obj)devkit8000.h
+ @rm -f $@
+ ln -s $(SRCTREE)/board/timll/devkit8000/devkit8000.c $@
+
+$(obj)devkit8000.h:
+ @rm -f $@
+ ln -s $(SRCTREE)/board/timll/devkit8000/devkit8000.h $@
+
+$(obj)clock.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/clock.c $@
+
+$(obj)mem.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/mem.c $@
+
+$(obj)sdrc.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/sdrc.c $@
+
+$(obj)sys_info.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/sys_info.c $@
+
+$(obj)syslib.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/syslib.c $@
+
+$(obj)eabi_compat.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/lib/eabi_compat.c $@
+
+$(obj)stdio.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/common/stdio.c $@
+
+$(obj)dlmalloc.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/common/dlmalloc.c $@
+
+$(obj)string.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/lib/string.c $@
+
+$(obj)console.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/common/console.c $@
+
+$(obj)ctype.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/lib/ctype.c $@
+
+$(obj)div64.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/lib/div64.c $@
+
+$(obj)div0.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/lib/div0.c $@
+
+#$(obj)serial.c:
+# @rm -f $@
+# ln -s $(SRCTREE)/common/serial.c $@
+
+$(obj)_divsi3.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/lib/_divsi3.S $@
+
+$(obj)_lshrdi3.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/lib/_lshrdi3.S $@
+
+$(obj)_udivsi3.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/lib/_udivsi3.S $@
+
+$(obj)cache.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/cache.S $@
+
+$(obj)vsprintf.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/lib/vsprintf.c $@
+
+$(obj)gpio.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/gpio.c $@
+
+$(obj)ns16550.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/serial/ns16550.c $@
+
+$(obj)serial.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/serial/serial.c $@
+
+$(obj)time.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/lib/time.c $@
+
+$(obj)omap24xx_i2c.c:omap24xx_i2c.h
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/i2c/omap24xx_i2c.c $@
+
+$(obj)omap24xx_i2c.h:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/i2c/omap24xx_i2c.h $@
+
+$(obj)reset.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap-common/reset.S $@
+
+$(obj)timer.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap-common/timer.c $@
+
+$(obj)nand_util.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/nand_util.c $@
+
+$(obj)nand.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/nand.c $@
+
+$(obj)omap_gpmc.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/omap_gpmc.c $@
+
+$(obj)nand_base.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/nand_base.c $@
+
+$(obj)nand_ids.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/nand_ids.c $@
+
+$(obj)nand_bbt.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/nand_bbt.c $@
+
+$(obj)nand_ecc.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/nand_ecc.c $@
+
+$(obj)mtdcore.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/mtdcore.c $@
+
+$(obj)lib_reset.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/lib/reset.c $@
+
+$(obj)nand_boot.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/nand_spl/nand_boot.c $@
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/nand_spl/board/timll/devkit8000/spl-devkit8000.c b/nand_spl/board/timll/devkit8000/spl-devkit8000.c
new file mode 100644
index 0000000..8d386ea
--- /dev/null
+++ b/nand_spl/board/timll/devkit8000/spl-devkit8000.c
@@ -0,0 +1,97 @@
+/*
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *
+ * Aneesh V <aneesh at ti.com>
+ *
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz at corscience.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* This file is based on the spl-omap.c by Aneesh V
+ * Patch Message-ID: 1305472900-4004-2-git-send-email-aneesh at ti.com
+ * This is the implementation for the OMAP3 platform.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/u-boot.h>
+#include <asm/utils.h>
+#include <asm/arch/sys_proto.h>
+#include <timestamp_autogenerated.h>
+#include <version_autogenerated.h>
+#include <asm/arch/mem.h>
+#include <image.h>
+#include <nand.h>
+
+/* Define global data structure pointer to it*/
+gd_t gdata __attribute__ ((section(".data")));
+bd_t bdata __attribute__ ((section(".data")));
+gd_t *gd = &gdata;
+
+typedef void (*u_boot_entry_t)(void)__attribute__ ((noreturn));
+
+/* C-Reimplementation of clear_bss of start.S. It initializes the
+ * bss section with 0x0 after the SDRAM was configured
+ */
+void clear_bss_spl(void)
+{
+ __u32 *i;
+ spl_debug(">>spl:clear_bss_spl()\n");
+ /* get bss linker symbols into C */
+ for (i = (__u32 *)(_bss_start_ofs); i <= (__u32 *)(_bss_end_ofs); i++)
+ *i = (__u32)0x00000000;
+ spl_debug("<<spl:clear_bss_spl()\n");
+}
+
+/* This replaces board_init_f/r for the SPL */
+void board_init_spl(ulong dummy)
+{
+ debug(">>board_init_f()\n");
+ clear_bss_spl(); /* SSBM XXX: if not necessary delete for speed */
+ gpmc_init();
+ nand_boot();
+ debug("<<board_init_f()\n");
+}
+
+inline void hang(void)
+{
+ puts("### ERROR ### Please RESET the board ###\n");
+ for (;;)
+ ;
+}
+
+void preloader_console_init(void)
+{
+ /* Set r8 to gd */
+ asm("ldr r8, [%0]" : : "r" (&gd) : "r8");
+ gd->bd = &bdata;
+ gd->flags |= GD_FLG_RELOC;
+ gd->baudrate = CONFIG_BAUDRATE;
+
+ serial_init(); /* serial communications setup */
+
+ printf("\nU-Boot SPL (compiled %s - %s)\n", U_BOOT_DATE,
+ U_BOOT_TIME);
+}
+
+
diff --git a/nand_spl/board/timll/devkit8000/u-boot.lds b/nand_spl/board/timll/devkit8000/u-boot.lds
new file mode 100644
index 0000000..24c9435
--- /dev/null
+++ b/nand_spl/board/timll/devkit8000/u-boot.lds
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <garyj at denx.de>
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ * Aneesh V <aneesh at ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+MEMORY { .sram : ORIGIN = CONFIG_SYS_SRAM_START, LENGTH = CONFIG_SYS_SPL_MAX_SIZE }
+MEMORY { .sdram : ORIGIN = PHYS_SDRAM_1, LENGTH = PHYS_SDRAM_1_SIZE }
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ .text :
+ {
+ __start = .;
+ start.o (.text)
+ *(.text*)
+ } >.sram
+
+ . = ALIGN(4);
+ .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
+
+ . = ALIGN(4);
+ .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
+ . = ALIGN(4);
+ __image_copy_end = .;
+ _end = .;
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start = .;
+ *(.bss*)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } >.sdram
+}
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