[U-Boot] [PATCH 7/8] Updates the at91sam9m10g45ek.h config file.

Alex Waterman awaterman at dawning.com
Thu Jun 30 21:33:06 CEST 2011


Moves to using newer defines and adds possible support for the
second bank of RAM (if so desired).

Also, some coding clean up: removed the needless define to 1s for
defines that just act as flags.

Signed-off-by: Alex Waterman <awaterman at dawning.com>
---
 include/configs/at91sam9m10g45ek.h |  188 +++++++++++++++++++++--------------
 1 files changed, 113 insertions(+), 75 deletions(-)

diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index de74dcf..5e02dde 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -27,48 +27,65 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+/*#define DEBUG*/
+
 #define CONFIG_AT91_LEGACY
+#define CONFIG_ATMEL_LEGACY
 
 /* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* from 12 MHz crystal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK	12000000 /* from 12 MHz crystal */
+#define AT91_SLOW_CLOCK		32768
 #define CONFIG_SYS_HZ		1000
 
-#define CONFIG_ARM926EJS	1	/* This is an ARM926EJS Core	*/
-#ifdef CONFIG_AT91SAM9M10G45EK
-#define CONFIG_AT91SAM9M10G45	1	/* It's an Atmel AT91SAM9M10G45 SoC*/
-#else
-#define CONFIG_AT91SAM9G45	1	/* It's an Atmel AT91SAM9G45 SoC*/
-#endif
+#define CONFIG_AT91SAM9M10G45
+#define CONFIG_AT91FAMILY
 #define CONFIG_ARCH_CPU_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/
 
-#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs	*/
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG	1
+#define CONFIGMDLINE_TAG		/* enable passing of ATAGs	*/
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+#define ATMEL_PIO_PORTS		5 /* 5 PIO ports. */
+#define CONFIG_SYS_SDRAM_BASE   0x70000000
+
 /*
  * Hardware drivers
  */
-#define CONFIG_AT91_GPIO	1
-#define CONFIG_ATMEL_USART	1
+#define CONFIG_AT91_GPIO
+#define CONFIG_ATMEL_USART
 #undef CONFIG_USART0
 #undef CONFIG_USART1
 #undef CONFIG_USART2
-#define CONFIG_USART3		1	/* USART 3 is DBGU */
+#define CONFIG_USART3		/* USART 3 is DBGU */
+#define CONFIG_USART_BASE	0xffffee00 /* Use the DBGU hardware. */
+#define CONFIG_USART_ID		10
+
+/*
+ * This needs to be defined for the OHCI code to work but it is defined as
+ * ATMEL_ID_UHPHS in the CPU specific header files.
+ */
+#define ATMEL_ID_UHP		ATMEL_ID_UHPHS
+
+/*
+ * Specify the clock enable bit in the PMC_SCER register.
+ */
+#define ATMEL_PMC_UHP		AT91SAM926x_PMC_UHP
 
 /* LCD */
-#define CONFIG_LCD			1
+#define CONFIG_LCD
 #define LCD_BPP				LCD_COLOR8
-#define CONFIG_LCD_LOGO			1
+#define CONFIG_LCD_LOGO
 #undef LCD_TEST_PATTERN
-#define CONFIG_LCD_INFO			1
-#define CONFIG_LCD_INFO_BELOW_LOGO	1
-#define CONFIG_SYS_WHITE_ON_BLACK		1
-#define CONFIG_ATMEL_LCD		1
-#define CONFIG_ATMEL_LCD_RGB565		1
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV		1
+#define CONFIG_LCD_INFO
+#define CONFIG_LCD_INFO_BELOW_LOGO
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONFIG_ATMEL_LCD
+#define CONFIG_ATMEL_LCD_RGB565
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
 /* board specific(not enough SRAM) */
 #define CONFIG_AT91SAM9G45_LCD_BASE		0x73E00000
 
@@ -82,10 +99,10 @@
 /*
  * BOOTP options
  */
-#define CONFIG_BOOTP_BOOTFILESIZE	1
-#define CONFIG_BOOTP_BOOTPATH		1
-#define CONFIG_BOOTP_GATEWAY		1
-#define CONFIG_BOOTP_HOSTNAME		1
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
 
 /*
  * Command line configuration.
@@ -98,35 +115,37 @@
 #undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_LOADS
 
-#define CONFIG_CMD_PING		1
-#define CONFIG_CMD_DHCP		1
-#define CONFIG_CMD_NAND		1
-#define CONFIG_CMD_USB		1
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_USB
 
 /* SDRAM */
-#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_NR_DRAM_BANKS		2
 #define PHYS_SDRAM			0x70000000
 #define PHYS_SDRAM_SIZE			0x08000000	/* 128 megs */
+#define PHYS_SDRAM_2			0x20000000
+#define PHYS_SDRAM_SIZE_2		0x08000000	/* 128 megs */
 
 /* DataFlash */
 #ifdef CONFIG_ATMEL_SPI
 #define CONFIG_CMD_SF
 #define CONFIG_CMD_SPI
-#define CONFIG_SPI_FLASH		1
-#define CONFIG_SPI_FLASH_ATMEL		1
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_ATMEL
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS	1
 #endif
 
 /* NOR flash, if populated */
-#ifndef CONFIG_CMD_NAND
-#define CONFIG_SYS_NO_FLASH		1
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_SYS_NO_FLASH
 #else
-#define CONFIG_SYS_FLASH_CFI		1
-#define CONFIG_FLASH_CFI_DRIVER		1
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
 #define PHYS_FLASH_1			0x10000000
-#define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
-#define CONFIG_SYS_MAX_FLASH_SECT		256
-#define CONFIG_SYS_MAX_FLASH_BANKS		1
+#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
+#define CONFIG_SYS_MAX_FLASH_SECT	256
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
 #endif
 
 /* NAND flash */
@@ -156,51 +175,69 @@
 #define CONFIG_USB_ATMEL
 #define CONFIG_USB_OHCI_NEW		1
 #define CONFIG_DOS_PARTITION		1
-#define CONFIG_SYS_USB_OHCI_CPU_INIT		1
-#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x00700000	/* AT91SAM9G45_UHP_OHCI_BASE */
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9g45"
+#define CONFIG_SYS_USB_OHCI_CPU_INIT	1
+#define CONFIG_SYS_USB_OHCI_REGS_BASE	0x00700000
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9g45"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
 #define CONFIG_USB_STORAGE		1
 
-#define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
-
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END			0x23e00000
-
-#ifdef CONFIG_SYS_USE_DATAFLASH
+#define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
 
-/* bootstrap + u-boot + env + linux in dataflash on CS0 */
-#define CONFIG_ENV_IS_IN_SPI_FLASH	1
-#define CONFIG_SYS_MONITOR_BASE	(0xC0000000 + 0x8400)
-#define CONFIG_ENV_OFFSET		0x4200
-#define CONFIG_ENV_ADDR		(0xC0000000 + CONFIG_ENV_OFFSET)
-#define CONFIG_ENV_SIZE		0x4200
-#define CONFIG_ENV_SECT_SIZE		0x10000
-#define CONFIG_BOOTCOMMAND	"cp.b 0xC0042000 0x22000000 0x210000; bootm"
-#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
-				"root=/dev/mtdblock0 " \
-				"mtdparts=atmel_nand:-(root) "\
-				"rw rootfstype=jffs2"
-
-#else /* CONFIG_SYS_USE_NANDFLASH */
+#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_END		0x23e00000
 
 /* bootstrap + u-boot + env + linux in nandflash */
-#define CONFIG_ENV_IS_IN_NAND	1
+#define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET		0x60000
 #define CONFIG_ENV_OFFSET_REDUND	0x80000
-#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
-#define CONFIG_BOOTCOMMAND	"nand read 0x72000000 0x200000 0x200000; bootm"
-#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
-				"root=/dev/mtdblock5 " \
-				"mtdparts=atmel_nand:128k(bootstrap)ro, \
-				256k(uboot)ro,128k(env1)ro,128k(env2)ro, \
-				2M(linux),-(root) " \
-				"rw rootfstype=jffs2"
+#define CONFIG_ENV_SIZE			0x20000
+#define CONFIG_BOOTCOMMAND	"nand read 0x70000000 0x100000 0x200000;" \
+	"bootm 0x70000000"
+#define CONFIG_BOOTARGS							\
+	"console=ttyS0,115200 "						\
+	"root=/dev/mtdblock5 "						\
+	"mtdparts=atmel_nand:128k(bootstrap)ro,"			\
+	"256k(uboot)ro,128k(env1)ro,128k(env2)ro,"			\
+	"2M at 1M(linux),-(root) "						\
+	"rw rootfstype=jffs2"
+
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
 
-#endif
+/*
+ * Extra environment variables.
+ */
+#define UPDATE_BOOTSTRAP				\
+	"update_bootstrap="				\
+	"tftpboot 0x70000000 ${_bootstrap}; "		\
+	"nand erase 0x0 0x20000; "			\
+	"nand write 0x70000000 0x0 0x20000\0"
+#define UPDATE_UBOOT					\
+	"update_uboot="					\
+	"tftpboot 0x70000000 ${_uboot}; "		\
+	"nand erase 0x20000 0x40000; "			\
+	"nand write 0x70000000 0x20000 0x40000\0"
+#define UPDATE_KERNEL					\
+	"update_kernel="				\
+	"tftpboot 0x70000000 ${_kernel}; "		\
+	"nand erase 0x100000 0x200000; "		\
+	"nand write 0x70000000 0x100000 0x200000\0"
+#define UPDATE_FS					\
+	"update_fs="					\
+	"tftpboot 0x70000000 ${_rootfs}; "		\
+	"nand erase 0x300000 0xfd00000; "		\
+	"nand write 0x70000000 0x300000 ${filesize}\0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS			\
+	UPDATE_BOOTSTRAP				\
+	UPDATE_UBOOT					\
+	UPDATE_KERNEL					\
+	UPDATE_FS					\
+	"_bootstrap=arm/at91bootstrap.bin\0"		\
+	"_uboot=arm/u-boot.bin\0"			\
+	"_kernel=arm/linux-kernel.bin\0"		\
+	"_rootfs=arm/atmel_fs.bin\0"
 
-#define CONFIG_BAUDRATE		115200
-#define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
 
 #define CONFIG_SYS_PROMPT		"U-Boot> "
 #define CONFIG_SYS_CBSIZE		256
@@ -216,7 +253,8 @@
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
-
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - \
+				GENERATED_GBL_DATA_SIZE)
 #define CONFIG_STACKSIZE	(32*1024)	/* regular stack */
 
 #ifdef CONFIG_USE_IRQ
-- 
1.7.4.4



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