[U-Boot] building enc28j60 for omap3: (omap3_spi rxtx)

[jacopo mondi]

On Wed, 23 Feb 2011 23:32:01 +0100
Anatolij Gustschin <agust at denx.de> wrote:

> Hi,
> 
> On Tue, 22 Feb 2011 17:34:30 +0100
> jacopo mondi <j.mondi at voltaelectronics.com> wrote:
> ...
> > Second issue is related to enc identification.
> > The following code section:
> > 
> > 	phid1 = phy_read(enc, PHY_REG_PHID1);
> > 	phid2 = phy_read(enc, PHY_REG_PHID2) & ENC_PHID2_MASK;
> > 	if (phid1 != ENC_PHID1_VALUE || phid2 != ENC_PHID2_VALUE) {
> > 		printf("%s: failed to identify PHY. Found
> > 		%04x:%04x\n",			enc->dev->name,
> > 		phid1, phid2);
> > 	 return -1;
> > 	}
> > 
> > fails because phy_read instructions return 0 or random values
> > (0xB0B0 or 0xB000).
> > Linux driver does not perform such tests, so I've tried removing
> > them.
> 
> No, please do not remove them. Fix the register access
> problem instead.
> 

Anatolj,
  how could the single register access work if all the spi setup and
startup is done in the spi_claim_bus function? (which is a bad design
in my opinion, since if I claim bus, it does not mean I want to start
the communication).

Anyway I've implemented the Transmit Receive mode, and verified it
works issuing a ping, that initialize enc and spi bus, and now I can
successfully read phy identifiers and the CLKRDY bit (which means that
read and write are now correct).

I'm still unable to ping because "`ethaddr' not set", maybe because
actually the transmit and receive mode is used only if txp and rxp are
not NULL (tx only or rx only methods are used either).
I can change that, but that means changing the omap_spi interface.

Also, the whole omap3_spi implementation has to be reworked, because
several things need to be added (turbo mode for 3 bytes transfers) and
some initialization work has to be moved from the claim_bus function to
the spi_xfer one...

I'll submit the receive-transmit mode patch only for now...
thank you
   j