[U-Boot] [PATCH 09/20] powerpc, 83xx: add kmsupx5 board support

[Heiko Schocher]

The Keymile SUPx5 board series is based on a PBEC8321 but
contains an additional PBUS FPGA (LPXF) on local bus CS2.

Signed-off-by: Thomas Reufer <thomas.reufer at keymile.com>
Signed-off-by: Heiko Schocher <hs at denx.de>
cc: Wolfgang Denk <wd at denx.de>
cc: Kim Phillips <kim.phillips at freescale.com>
cc: Valentin Longchamp <valentin.longchamp at keymile.com>
cc: Holger Brunck <holger.brunck at keymile.com>
---
 MAINTAINERS               |    1 +
 boards.cfg                |    1 +
 include/configs/kmsupx5.h |   89 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 91 insertions(+), 0 deletions(-)
 create mode 100644 include/configs/kmsupx5.h

diff --git a/MAINTAINERS b/MAINTAINERS
index e4525e4..730e306 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -427,6 +427,7 @@ Heiko Schocher <hs at denx.de>
 	ids8247		MPC8247
 	jupiter		MPC5200
 	kmeter1		MPC8360
+	kmsupx5		MPC8321
 	mgcoge		MPC8247
 	mgcoge2ne	MPC8247
 	mgcoge2un	ARM926EJS (Kirkwood SoC)
diff --git a/boards.cfg b/boards.cfg
index 3c45456..d1ec52e 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -477,6 +477,7 @@ kmeter1                      powerpc     mpc83xx     km83xx              keymile
 MVBLM7                       powerpc     mpc83xx     mvblm7              matrix_vision
 SIMPC8313_LP                 powerpc     mpc83xx     simpc8313           sheldon        -           SIMPC8313:NAND_LP
 SIMPC8313_SP                 powerpc     mpc83xx     simpc8313           sheldon        -           SIMPC8313:NAND_SP
+kmsupx5                      powerpc     mpc83xx     km83xx              keymile
 suvd3                        powerpc     mpc83xx     km83xx              keymile
 TQM834x                      powerpc     mpc83xx     tqm834x             tqc
 tuda1                        powerpc     mpc83xx     km83xx              keymile
diff --git a/include/configs/kmsupx5.h b/include/configs/kmsupx5.h
new file mode 100644
index 0000000..ff9883e
--- /dev/null
+++ b/include/configs/kmsupx5.h
@@ -0,0 +1,89 @@
+/*
+ * Copyright (C) 2006 Freescale Semiconductor, Inc.
+ *                    Dave Liu <daveliu at freescale.com>
+ *
+ * Copyright (C) 2007 Logic Product Development, Inc.
+ *                    Peter Barada <peterb at logicpd.com>
+ *
+ * Copyright (C) 2007 MontaVista Software, Inc.
+ *                    Anton Vorontsov <avorontsov at ru.mvista.com>
+ *
+ * (C) Copyright 2008
+ * Heiko Schocher, DENX Software Engineering, hs at denx.de.
+ *
+ * (C) Copyright 2010
+ * Lukas Roggli, KEYMILE Ltd, lukas.roggli at keymile.com
+ *
+ * (C) Copyright 2010
+ * Thomas Reufer, KEYMILE Ltd, thomas.reufer at keymile.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_KMSUPX5		1 /* Keymile PBEC8321 board specific */
+#define CONFIG_HOSTNAME		supx5
+#define CONFIG_KM_BOARD_NAME	"supx5"
+
+#define	CONFIG_SYS_TEXT_BASE	0xF0000000
+
+/* include common defines/options for all 8321 Keymile boards */
+#include "km8321-common.h"
+
+/*
+ * Init Local Bus Memory Controller:
+ *
+ * Bank Bus     Machine PortSz  Size  Device
+ * ---- ---     ------- ------  -----  ------
+ *  2   Local   GPCM    8 bit  256MB 	LPXF
+ *  3   Local   not used
+ *
+ */
+
+/*
+ * LPXF on the local bus CS2
+ * Window base at flash base
+ * Window size: 256 MB
+ */
+
+#define	CONFIG_SYS_LPXF_BASE		0xA0000000    // LPXF
+#define	CONFIG_SYS_LPXF_SIZE		256 // Megabytes
+
+#define CONFIG_SYS_LBLAWBAR2_PRELIM	CONFIG_SYS_LPXF_BASE
+#define CONFIG_SYS_LBLAWAR2_PRELIM	LBLAWAR_EN | LBLAWAR_256MB
+
+#define CONFIG_SYS_BR2_PRELIM       (CONFIG_SYS_LPXF_BASE | \
+				BR_PS_8 | \
+				BR_MS_GPCM | \
+				BR_V)
+
+#define CONFIG_SYS_OR2_PRELIM	(MEG_TO_AM(CONFIG_SYS_LPXF_SIZE) | \
+				OR_GPCM_CSNT | \
+				OR_GPCM_ACS_DIV4 | \
+				OR_GPCM_SCY_2 | \
+				(OR_GPCM_TRLX & \
+				(~OR_GPCM_EHTR)) |  /* EHTR = 0 */ \
+				OR_GPCM_EAD)
+
+/* LPXF:  icache cacheable, but dcache-inhibit and guarded */
+#define CONFIG_SYS_IBAT5L	(CONFIG_SYS_LPXF_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CONFIG_SYS_IBAT5U	(CONFIG_SYS_LPXF_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_DBAT5L	(CONFIG_SYS_LPXF_BASE | BATL_PP_10 | \
+				BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CONFIG_SYS_DBAT5U	CONFIG_SYS_IBAT5U
+
+/* Bank 3 not used */
+#define CONFIG_SYS_IBAT6L       (0)
+#define CONFIG_SYS_IBAT6U       (0)
+#define CONFIG_SYS_DBAT6L       CONFIG_SYS_IBAT6L
+#define CONFIG_SYS_DBAT6U       CONFIG_SYS_IBAT6U
+
+#endif /* __CONFIG_H */
-- 
1.7.4