[U-Boot] p4080ds starts OS with MSR[EE]=1 and DEC armed?

[Jimi Xenidis]

On Mar 15, 2011, at 3:24 PM, Scott Wood wrote:
> 
> On Tue, 15 Mar 2011 14:21:03 -0500
> Timur Tabi <timur at freescale.com> wrote:
> 
>> On Sun, Mar 13, 2011 at 10:46 AM, Jimi Xenidis <jimix at watson.ibm.com> wrote:
>> 
>>> Turns out that TSR[DIS] was on when my program took over, and this is ePAPR legal.
>>> I need to reset the DEC in my code.
>> 
>> I wonder if it should be legal.  What value does it have to leave a
>> pending decrementer interrupt when booting the OS?  That just forces
>> every OS to program the decrementer and clear DIS before enabling
>> interrupts.
> 
> The OS should ensure that timer interrupts are functioning the way it wants
> before it enables interrupts -- but in any case, once it enables interrupts
> it should be able to handle any interrupt that is enabled.  There's no
> general need to clear DIS.

I guess I could go either way on this.

> 
> There's actually no good way for boot software to ensure that TSR[DIS] is
> clear, other than stopping the timebase (not allowed, or at least shouldn't
> be), or assuming that the OS will take control of the decrementer within a
> reasonable amount of time.  We could require that TCR[DIE] be clear, but
> that just imposes an extra requirement on boot software for no good reason

That is true for "server" and "classic" because they do not necessarily stop at 0.
for embedded you can just:
	/* u-boot leaves decrementer enabled */
	mtspr(SPRN_DECAR, 0); /* paranoia */
	mtspr(SPRN_DEC, 0);
	mtspr(SPRN_TCR, 0);
	mtspr(SPRN_TSR, 0);

And there is no way in hell any timer will go off, right?
-JX