[U-Boot] [PATCH 6/9] ARM: Implement CONFIG_SKIP_LOWLEVEL_INIT for arm926ej-s

Michael Spang mspang at csclub.uwaterloo.ca
Thu Mar 17 20:47:00 CET 2011


The TS-7800 needs to skip SDRAM initialization since it loads from
RAM, but the CPU should still be initialized to the correct state.
Thus we add an #ifdef around the call to the lowlevel_init function.

Signed-off-by: Michael Spang <mspang at csclub.uwaterloo.ca>
---
 arch/arm/cpu/arm926ejs/at91/Makefile    |    2 ++
 arch/arm/cpu/arm926ejs/davinci/Makefile |    2 ++
 arch/arm/cpu/arm926ejs/orion5x/Makefile |    2 ++
 arch/arm/cpu/arm926ejs/start.S          |    3 +++
 4 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile b/arch/arm/cpu/arm926ejs/at91/Makefile
index 7fb1a0a..efe9e9bd 100644
--- a/arch/arm/cpu/arm926ejs/at91/Makefile
+++ b/arch/arm/cpu/arm926ejs/at91/Makefile
@@ -42,8 +42,10 @@ COBJS-y	+= reset.o
 COBJS-y	+= timer.o
 
 ifndef CONFIG_SKIP_CPU_INIT_CRIT
+ifndef CONFIG_SKIP_LOWLEVEL_INIT
 SOBJS-y	:= lowlevel_init.o
 endif
+endif
 
 SRCS    := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS    := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
diff --git a/arch/arm/cpu/arm926ejs/davinci/Makefile b/arch/arm/cpu/arm926ejs/davinci/Makefile
index 3442f6e..d283d61 100644
--- a/arch/arm/cpu/arm926ejs/davinci/Makefile
+++ b/arch/arm/cpu/arm926ejs/davinci/Makefile
@@ -37,8 +37,10 @@ COBJS-$(CONFIG_DRIVER_TI_EMAC)	+= lxt972.o dp83848.o et1011c.o
 SOBJS	= reset.o
 
 ifndef CONFIG_SKIP_CPU_INIT_CRIT
+ifndef CONFIG_SKIP_LOWLEVEL_INIT
 SOBJS	+= lowlevel_init.o
 endif
+endif
 
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/arch/arm/cpu/arm926ejs/orion5x/Makefile b/arch/arm/cpu/arm926ejs/orion5x/Makefile
index 780fe18..8045e53 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/Makefile
+++ b/arch/arm/cpu/arm926ejs/orion5x/Makefile
@@ -34,8 +34,10 @@ COBJS-y	+= dram.o
 COBJS-y	+= timer.o
 
 ifndef CONFIG_SKIP_CPU_INIT_CRIT
+ifndef CONFIG_SKIP_LOWLEVEL_INIT
 SOBJS	:= lowlevel_init.o
 endif
+endif
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS-y))
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index c0a2532..2e1d5ec 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -334,12 +334,15 @@ cpu_init_crit:
 	orr	r0, r0, #0x00001000	/* set bit 12 (I) I-Cache */
 	mcr	p15, 0, r0, c1, c0, 0
 
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
 	/*
 	 * Go setup Memory and board specific bits prior to relocation.
 	 */
 	mov	ip, lr		/* perserve link reg across call */
 	bl	lowlevel_init	/* go setup pll,mux,memory */
 	mov	lr, ip		/* restore link */
+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+
 	mov	pc, lr		/* back to my caller */
 #endif /* CONFIG_SKIP_CPU_INIT_CRIT */
 
-- 
1.7.2.3



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