[U-Boot] [PATCH 2/8] orion5x: Fix wrong address in orion5x_sdram_bar
Michael Spang
mspang at csclub.uwaterloo.ca
Fri Mar 18 07:46:14 CET 2011
On Fri, Mar 18, 2011 at 1:57 AM, Rogan Dawes <rogan at dawes.za.net> wrote:
> On 2011/01/29 9:24 AM, Albert ARIBAUD wrote:
>> Hi Michael,
>>
>> Le 29/01/2011 02:00, Michael Spang a écrit :
>>> This code intends to read the SDRAM controller base address registers
>>> but is instead reading the CPU window base address registers.
>>
>> Side note: IIUC this change is not required since the CPU Window
>> registers match the SDRAM controller registers on orion5x in U-boot; but
>> it is fine if only for the sake of correctness, and assuming it works
>> for other orion5x boards (testing underway for edminiv2).
>
> I have this same change in my patch set for the DNS323, for what it is
> worth. I must have needed it, but I can't remember exactly what the
> behaviour was without it. :-)
>
> Rogan
>
I was having trouble remembering what was wrong as well. It turns out
the CPU window registers are not actually laid out in the way that the
structure and code expect. The "cpu address map registers" have the
layout
struct {
u32 control;
u32 base;
};
which is not the same as the SD-RAM registers:
struct {
u32 base;
u32 size;
};
The result is that the test to see if the window is enabled fails,
even though it is enabled. This works by coincidence for the TS-7800,
because the window being disabled causes the correct base address of 0
to be returned.
Michael
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