[U-Boot] [PATCH 1/5] powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdb

[Kumar Gala]

On Mar 6, 2011, at 10:17 PM, Kumar Gala wrote:

> From: Priyanka Jain <Priyanka.Jain at freescale.com>
> 
> Using DDR as RAMBOOT base instead of L2SRAM for SDCard and SPI Flash
> boot loaders because:
> - P1_P2_RDB boards have soldered DDR so no need for SPD
> - Also P102x has 256K L2 cache size so becomes a limiting factor for
>  size of image that could be loaded in SRAM mode and would require three
>  stage boot loader (TPL).
> 
> Changes done:
> 1. CONFIG_SYS_TEXT_BASE to 0x11000000
> 2. CONFIG_RESET_VECTOR_ADDRESS to 0x1107fffc
> 
> Signed-off-by: Priyanka Jain <Priyanka.Jain at freescale.com>
> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal at freescale.com>
> Signed-off-by: Dipen Dudhat <Dipen.Dudhat at freescale.com>
> Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
> ---
> board/freescale/p1_p2_rdb/ddr.c |   15 +++++++++++----
> board/freescale/p1_p2_rdb/tlb.c |   13 ++++---------
> include/configs/P1_P2_RDB.h     |    8 ++++----
> 3 files changed, 19 insertions(+), 17 deletions(-)

applied to 85xx next

- k