[U-Boot] [PATCH 6/7] phylib: Add a bunch of PHY drivers from tsec

[Andy Fleming]

On Mar 30, 2011, at 7:26 AM, Detlev Zundel wrote:

> Hi Andy,
> 
>> The tsec driver had a bunch of PHY drivers already written. This
>> converts them all into PHY Lib drivers, and serves as the first
>> set of PHY drivers for PHY Lib.
>> 
>> Signed-off-by: Andy Fleming <afleming at freescale.com>
> 
> [...]
> 
>> diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
>> new file mode 100644
>> index 0000000..68bb5cd
>> --- /dev/null
>> +++ b/drivers/net/phy/atheros.c
>> @@ -0,0 +1,37 @@
>> +/*
>> + * Atheros PHY drivers
>> + *
>> + * This software may be used and distributed according to the
>> + * terms of the GNU Public License, Version 2, incorporated
>> + * herein by reference.
> 
> Again, new files need GPLv2+.  I know that this is split out from a
> GPLv2 file, but we have our rules in the meantime.

Fixed.
> 
> 
> 
>> +static int bcm54xx_parse_status(struct phy_device *phydev)
>> +{
>> +	unsigned int mii_reg;
>> +
>> +	mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXSTATUS);
>> +
>> +	switch ((mii_reg & MIIM_BCM54xx_AUXSTATUS_LINKMODE_MASK) >>
>> +			MIIM_BCM54xx_AUXSTATUS_LINKMODE_SHIFT) {
>> +		case 1:
>> +		phydev->duplex = DUPLEX_HALF;
>> +		phydev->speed = SPEED_10;
>> +		break;
>> +		case 2:
>> +		phydev->duplex = DUPLEX_FULL;
>> +		phydev->speed = SPEED_10;
>> +		break;
>> +		case 3:
>> +		phydev->duplex = DUPLEX_HALF;
>> +		phydev->speed = SPEED_100;
>> +		break;
>> +		case 5:
>> +		phydev->duplex = DUPLEX_FULL;
>> +		phydev->speed = SPEED_100;
>> +		break;
>> +		case 6:
>> +		phydev->duplex = DUPLEX_HALF;
>> +		phydev->speed = SPEED_1000;
>> +		break;
>> +		case 7:
>> +		phydev->duplex = DUPLEX_FULL;
>> +		phydev->speed = SPEED_1000;
>> +		break;
>> +		default:
>> +		printf("Auto-neg error, defaulting to 10BT/HD\n");
>> +		phydev->duplex = DUPLEX_HALF;
>> +		phydev->speed = SPEED_10;
>> +		break;
> 
> Very strange indentation, please fix.

done
> 
> 
> 
>> +/* Parse the 88E1011's status register for speed and duplex
>> + * information
>> + */
>> +static uint m88e1011s_parse_status(struct phy_device *phydev)
>> +{
>> +	unsigned int speed;
>> +	unsigned int mii_reg;
>> +
>> +	mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1011_PHY_STATUS);
>> +
>> +	if ((mii_reg & MIIM_88E1011_PHYSTAT_LINK) &&
>> +		!(mii_reg & MIIM_88E1011_PHYSTAT_SPDDONE)) {
>> +		int i = 0;
>> +
>> +		puts("Waiting for PHY realtime link");
>> +		while (!(mii_reg & MIIM_88E1011_PHYSTAT_SPDDONE)) {
>> +			/* Timeout reached ? */
>> +			if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
>> +				puts(" TIMEOUT !\n");
>> +				phydev->link = 0;
>> +				break;
>> +			}
>> +
>> +			if ((i++ % 1000) == 0) {
>> +				putc('.');
>> +			}
>> +			udelay(1000);
>> +			mii_reg = phy_read(phydev, MDIO_DEVAD_NONE,
>> +					MIIM_88E1011_PHY_STATUS);
>> +		}
>> +		puts(" done\n");
>> +		udelay(500000);	/* another 500 ms (results in faster booting) */
> 
> Ah, again the "faster booting when waiting half a second" - probably
> that's the origin ;)  Still a comment will be nice.


Hmm... I'm going to think about this one.  We had some discussions about it on the list before, and I'm once again pondering whether we can drop it with proper changes.  As usual, the 802.3 spec likes to leave some things up to PHY vendors.  Like the meaning of "link up".

> 
>> +	m88e1011s_parse_status(phydev);
>> +
>> +	return 0;
>> +}
>> +
>> +/* Marvell 88E1149S */
>> +static int m88e1149_config(struct phy_device *phydev)
>> +{
>> +	/* Reset and configure the PHY */
>> +	phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
>> +
>> +	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
>> +	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x200c);
>> +	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
>> +	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x0);
>> +	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
> 
> Lots of magic numbers - defines would be nice.


Sadly, I can fill in some of these, but Marvell did not provide documentation to us on these fixes.  Just a sequence of register writes.

I'll ponder the half-second thing some more.  I will note that this is the way it currently is for tsec, so it's not really a degradation in functionality, but I agree that other ports may not want to use Freescale's ugly hacks when things work just fine for them without them.

Andy