[U-Boot] [PATCH v3] fsl_ddr: Don't use full 64-bit divides on 32-bit PowerPC

[Kumar Gala]

On Mar 15, 2011, at 10:23 AM, Kyle Moffett wrote:

> The current FreeScale MPC-8xxx DDR SPD interpreter is using full 64-bit
> integer divide operations to convert between nanoseconds and DDR clock
> cycles given arbitrary DDR clock frequencies.
> 
> Since all of the inputs to this are 32-bit (nanoseconds, clock cycles,
> and DDR frequencies), we can easily restructure the computation to use
> the "do_div()" function to perform 64-bit/32-bit divide operations.
> 
> On 64-bit this change is basically a no-op, because do_div is
> implemented as a literal 64-bit divide operation and the instruction
> scheduling works out almost the same.
> 
> On 32-bit PowerPC a fully accurate 64/64 divide (__udivdi3 in libgcc) is
> over 1.1kB of code and thousands of heavily dependent cycles to compute,
> all of which is linked from libgcc.  Another 1.2kB of code comes in for
> the function __umoddi3.
> 
> It should be noted that nothing else in U-Boot or the Linux kernel seems
> to require a full 64-bit divide on my 32-bit PowerPC.
> 
> Build-and-boot-tested on the HWW-1U-1A board using DDR2 SPD detection.
> 
> Signed-off-by: Kyle Moffett <Kyle.D.Moffett at boeing.com>
> Acked-by: York Sun <yorksun at freescale.com>
> Cc: Andy Fleming <afleming at gmail.com>
> Cc: Kumar Gala <kumar.gala at freescale.com>
> 
> --
> Changelog:
> v2: Resubmitted separately from the other HWW-1U-1A patches
> v3: Rebased on the 'next' branch of git://git.denx.de/u-boot-mpc85xx.git
> 
> arch/powerpc/cpu/mpc8xxx/ddr/util.c |   56 +++++++++++++++++++++++++----------
> 1 files changed, 40 insertions(+), 16 deletions(-)

applied to 85xx next

- k