[U-Boot] [PATCH] post: new parallel nor flash test

[Mike Frysinger]

On Tuesday, May 10, 2011 16:17:00 Wolfgang Denk wrote:
> Mike Frysinger wrote:
> > This adds a simple parallel nor flash test to automatically verify
> > erasing/writing/reading of sectors.  The code is based on existing
> > Blackfin tests but generalized for everyone to use.
> 
> What exactly does the "parallel" in "parallel nor flash test" mean?

how it is connected to the processor

> > -COBJS-$(CONFIG_HAS_POST)	+= i2c.o memory.o rtc.o
> > +COBJS-$(CONFIG_HAS_POST)	+= flash.o i2c.o memory.o rtc.o
> 
> This has always been a thorn in my side.  can we not change this such
> that for example flash.o gets only built when CONFIG_SYS_POST_FLASH is
> set in CONFIG_POST ?

no, not atm.  the current POST design has CONFIG_POST as a bit field.  that 
should probably be fixed more generally since we seem to be hitting the bit 
field limit.  but this would have to be fixed for the entire post tree and not 
individual tests.

> > +static void *seed_src_data(ulong *old_len, ulong new_len)
> > +{
> > +	unsigned char *ret = (void *)CONFIG_SYS_SDRAM_BASE;
> 
> This will not work on many systems.  For example, on PPC you will
> overwrite the exception vectors in low memory, thus crashing the
> system.

this is how the default memory post test works.  it writes all memory from 
CONFIG_SYS_SDRAM_BASE to CONFIG_SYS_SDRAM_BASE+MIN(1GiB,bd->memsize).  so how 
does this work on ppc systems ?

i didnt think calling malloc() would be OK since i need enough memory to hold 
one sector ...
-mike
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