[U-Boot] [PATCH v3 2/2] mpc85xx: support for Freescale COM Express P2020

Ira W. Snyder iws at ovro.caltech.edu
Fri Nov 11 18:12:32 CET 2011


On Fri, Nov 11, 2011 at 04:58:17PM +0000, McClintock Matthew-B29882 wrote:
> On Fri, Nov 11, 2011 at 10:53 AM, Ira W. Snyder <iws at ovro.caltech.edu> wrote:
> >> Does the board really support different DDR freq or is this copy / paste?
> >>
> >
> > The memory is an SODIMM, but the RAM is configured before U-Boot runs by
> > the Freescale On-Chip ROM. See above comment.
> 
> If this is a P2020 you could use the on chip rom to copy u-boot to
> L2SRAM and configure DDR via SPD - if you ever plan to change the
> SODIMMs this could be very useful.
> 

Yep, this is a P2020.

I'll check the Freescale documentation. Hopefully it provides an example
of how to configure the On-Chip ROM to use L2SRAM instead of DDR.

I'll try and find a U-Boot port that configures DDR via SPD. I'm sure
there are plenty, however any hints are welcome. :)

Thanks for the input,
Ira


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