[U-Boot] [PATCH v3 2/2] mpc85xx: support for Freescale COM Express P2020

[McClintock Matthew-B29882]

On Fri, Nov 11, 2011 at 3:03 PM, Ira W. Snyder <iws at ovro.caltech.edu> wrote:
> Thanks. That config_sram.dat is exactly what I came up with.
>
> I have my board booting via L2SRAM, but the DDR doesn't get configured
> correctly yet. I'm trying to figure out how the DDR SPD stuff works in
> U-Boot. I've never used it before. I'm following the P2020DS code as an
> example, but I haven't yet figured out how the code in
> board/freescale/p2020ds/ddr.c was derived (the board_specific_parameters
> structure especially).

If you board has i2c to the ddr modules it should be able to use the
timing info from there. I think CONFIG_DDR_SPD is the config option
you are looking for. I know the P2020DS does SPD from L2SRAM.

-M