[U-Boot] [PATCH] Add PR1 Appliance - ISDN PRI board
Mike Frysinger
vapier at gentoo.org
Sat Nov 19 21:17:27 CET 2011
On Saturday 19 November 2011 10:18:16 Dimitar Penev wrote:
> >> +void board_reset(void)
> >> +{
> >> + /* workaround for weak pull ups on ssel */
> >> + if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
> >> + bfin_reset_boot_spi_cs(GPIO_PF10);
> >> +}
> >
> >do you actually have this problem in the hardware ? or is this just left
> >over
> >from copying the old bf537 file ?
>
> PR1 Appliance seems to boot from SPI FLASH properly without the
> board_reset().
> From the other side we use 10KOhm on the SSEL pin the same as in
> BF537-STAMP I think
> so I am not sure why we will have no issue if it is observed in
> BF537-STAMP. Removing board_reset() for now
i don't think the issue was ever observed on a bf537-stamp board. in looking
at the convoluted history, the original report came in due to a customer
board: http://blackfin.uclinux.org/gf/tracker/1401
unfortunately, the kernel and u-boot blackfin ports at that time were so bad,
that the change went into common code. which means later on, as things were
untangled, they were pushed out into the boards files. part of that is my
fault for not fully figuring out what was going on.
so this should get punted for the bf537-stamp board and others. i'll take
care of that.
> >> +#define CONFIG_SYS_NO_FLASH /* we have only NAND */
> >
> >not true ... you have SPI too ;)
>
> Or do you refer to my comment only? Fixed.
yes
> >> +#define CONFIG_NET_MULTI 1
> >
> >no longer needed -> delete
>
> The included patch is with the above line removed as per your advice.
>
> If I test with the 2011R1-RC3 from the ADI repository I still need it
> however.
> Note that I have tested the patch (with CONFIG_NET_MULTI ) against the ADI
> repository
> (not the mainstream) and this is what I can confirm as working on PR1
> Appliance.
right, NET_MULTI is needed for the last release, but to get into mainline
u-boot, you'll need to drop it :). so i'll merge it into the u-boot mainline,
but it won't be part of ADI's 2011R1 release. it should make it into the
release after that though (2012R1).
what do you think of the attached patch ?
-mike
From dff768364651f19f403346eed1360c2a9a55dab3 Mon Sep 17 00:00:00 2001
From: Dimitar Penev <dpn at switchfin.org>
Date: Sat, 19 Nov 2011 15:02:00 -0500
Subject: [PATCH] Blackfin: pr1: new board port
Signed-off-by: Dimitar Penev <dpn at switchfin.org>
Signed-off-by: Mike Frysinger <vapier at gentoo.org>
---
MAINTAINERS | 4 +
board/pr1/Makefile | 50 +++++++++++++++
board/pr1/config.mk | 30 +++++++++
board/pr1/pr1.c | 30 +++++++++
boards.cfg | 1 +
include/configs/pr1.h | 160 +++++++++++++++++++++++++++++++++++++++++++++++++
6 files changed, 275 insertions(+), 0 deletions(-)
create mode 100644 board/pr1/Makefile
create mode 100644 board/pr1/config.mk
create mode 100644 board/pr1/pr1.c
create mode 100644 include/configs/pr1.h
diff --git a/MAINTAINERS b/MAINTAINERS
index f6f6b72..0c7e15a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1134,6 +1134,10 @@ Chong Huang <chuang at ucrobotics.com>
bf525-ucr2 BF525
+Dimitar Penev <dpn at switchfin.org>
+
+ PR1 Appliance BF537
+
#########################################################################
# NDS32 Systems: #
# #
diff --git a/board/pr1/Makefile b/board/pr1/Makefile
new file mode 100644
index 0000000..6ae998f
--- /dev/null
+++ b/board/pr1/Makefile
@@ -0,0 +1,50 @@
+#
+# U-boot - Makefile
+#
+# Copyright (c) Switchfin Org. <dpn at switchfin.org>
+#
+# Copyright (c) 2005-2007 Analog Device Inc.
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS-y := $(BOARD).o
+
+SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS-y))
+SOBJS := $(addprefix $(obj),$(SOBJS-y))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/pr1/config.mk b/board/pr1/config.mk
new file mode 100644
index 0000000..9d66d26
--- /dev/null
+++ b/board/pr1/config.mk
@@ -0,0 +1,30 @@
+#
+# Copyright (c) Switchfin Org. <dpn at switchfin.org>
+#
+# Copyright (c) 2005-2008 Analog Device Inc.
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+CFLAGS_lib += -O2
+CFLAGS_lib/lzma += -O2
+CFLAGS_lib/zlib += -O2
diff --git a/board/pr1/pr1.c b/board/pr1/pr1.c
new file mode 100644
index 0000000..bb907f3
--- /dev/null
+++ b/board/pr1/pr1.c
@@ -0,0 +1,30 @@
+/*
+ * U-boot - main board file
+ *
+ * Copyright (c) Switchfin Org. <dpn at switchfin.org>
+ *
+ * Copyright (c) 2005-2008 Analog Devices Inc.
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <common.h>
+#include <net.h>
+#include <netdev.h>
+
+int checkboard(void)
+{
+ printf("Board: Switchvoice PR1 Appliance\n");
+ printf(" Support: http://www.switchvoice.com/\n");
+ return 0;
+}
+
+#ifdef CONFIG_BFIN_MAC
+int board_eth_init(bd_t *bis)
+{
+ return bfin_EMAC_initialize(bis);
+}
+#endif
diff --git a/boards.cfg b/boards.cfg
index c83d861..f152085 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -272,6 +272,7 @@ ibf-dsp561 blackfin blackfin
ip04 blackfin blackfin
tcm-bf518 blackfin blackfin
tcm-bf537 blackfin blackfin
+pr1 blackfin blackfin
eNET x86 x86 eNET - sc520 eNET:SYS_TEXT_BASE=0x38040000
eNET_SRAM x86 x86 eNET - sc520 eNET:SYS_TEXT_BASE=0x19000000
sandbox sandbox sandbox sandbox sandbox -
diff --git a/include/configs/pr1.h b/include/configs/pr1.h
new file mode 100644
index 0000000..b3dd249
--- /dev/null
+++ b/include/configs/pr1.h
@@ -0,0 +1,160 @@
+/*
+ * U-boot - Configuration file for PR1 Appliance
+ *
+ * based on bf537-stamp.h
+ * Copyright (c) Switchfin Org. <dpn at switchfin.org>
+ */
+
+#ifndef __CONFIG_PR1_H__
+#define __CONFIG_PR1_H__
+
+#include <asm/config-pre.h>
+
+
+/*
+ * Processor Settings
+ */
+#define CONFIG_BFIN_CPU bf537-0.3
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
+
+
+/*
+ * Clock Settings
+ * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
+ * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
+ */
+/* CONFIG_CLKIN_HZ is any value in Hz */
+#define CONFIG_CLKIN_HZ 25000000
+/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
+/* 1 = CLKIN / 2 */
+#define CONFIG_CLKIN_HALF 0
+/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
+/* 1 = bypass PLL */
+#define CONFIG_PLL_BYPASS 0
+/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
+/* Values can range from 0-63 (where 0 means 64) */
+#define CONFIG_VCO_MULT 24
+/* CCLK_DIV controls the core clock divider */
+/* Values can be 1, 2, 4, or 8 ONLY */
+#define CONFIG_CCLK_DIV 1
+/* SCLK_DIV controls the system clock divider */
+/* Values can range from 1-15 */
+#define CONFIG_SCLK_DIV 5
+
+
+/*
+ * Memory Settings
+ */
+#define CONFIG_MEM_ADD_WDTH 11
+#define CONFIG_MEM_SIZE 128
+
+#define CONFIG_EBIU_SDRRC_VAL 0x306
+#define CONFIG_EBIU_SDGCTL_VAL 0x8091998d
+
+#define CONFIG_EBIU_AMGCTL_VAL 0xFF
+#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
+#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
+
+#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (384 * 1024)
+
+
+/*
+ * Network Settings
+ */
+#ifndef __ADSPBF534__
+#define ADI_CMDS_NETWORK 1
+#define CONFIG_BFIN_MAC
+#define CONFIG_NETCONSOLE 1
+#endif
+#define CONFIG_HOSTNAME pr1
+#define CONFIG_IPADDR 192.168.1.100
+#define CONFIG_GATEWAYIP 192.168.1.1
+#define CONFIG_SERVERIP 192.168.1.2
+#define CONFIG_TFTP_BLOCKSIZE 4404
+/* Uncomment next line to use fixed MAC address */
+/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
+
+
+/*
+ * Flash Settings
+ */
+#define CONFIG_SYS_NO_FLASH /* We have no parallel FLASH */
+
+
+/*
+ * SPI Settings
+ */
+#define CONFIG_BFIN_SPI
+#define CONFIG_ENV_SPI_MAX_HZ 30000000
+#define CONFIG_SF_DEFAULT_SPEED 30000000
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+
+
+/*
+ * Env Storage Settings
+ */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_OFFSET 0x10000
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE 0x10000
+#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
+
+
+/*
+ * I2C Settings
+ */
+#define CONFIG_BFIN_TWI_I2C 1
+#define CONFIG_HARD_I2C 1
+
+
+/*
+ * NAND Settings
+ */
+#define CONFIG_NAND_PLAT
+#define CONFIG_SYS_NAND_BASE 0x20000000
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+
+#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
+#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1))
+#define BFIN_NAND_WRITE(addr, cmd) \
+ do { \
+ bfin_write8(addr, cmd); \
+ SSYNC(); \
+ } while (0)
+
+#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
+#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
+#define NAND_PLAT_GPIO_DEV_READY GPIO_PF9
+
+/*
+ * Misc Settings
+ */
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_RTC_BFIN
+#define CONFIG_UART_CONSOLE 0
+#define CONFIG_SYS_PROMPT "pr1>"
+#define CONFIG_BOOTCOMMAND "run nandboot"
+#define CONFIG_BOOTDELAY 2
+#define CONFIG_LOADADDR 0x2000000
+
+
+/*
+ * Pull in common ADI header for remaining command/environment setup
+ */
+#include <configs/bfin_adi_common.h>
+
+/*
+ * Overwrite some settings defined in bfin_adi_common.h
+ */
+#undef NAND_ENV_SETTINGS
+#define NAND_ENV_SETTINGS \
+ "nandargs=set bootargs " CONFIG_BOOTARGS "\0" \
+ "nandboot=" \
+ "nand read $(loadaddr) 0x0 0x900000;" \
+ "run nandargs;" \
+ "bootm" \
+ "\0"
+
+#endif
--
1.7.6.1
-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 836 bytes
Desc: This is a digitally signed message part.
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20111119/bb8276bf/attachment.pgp>
More information about the U-Boot
mailing list