[U-Boot] [PATCH 2/2] ARM: omap3: add support to Technexion twister board

[Igor Grinberg]

Sorry, missed the below in the first reply

On 11/23/11 11:26, Stefano Babic wrote:
> The twister board is a development board using
> the TAM3517 SOM.
> 
> Support for NAND, 2 Ethernet (EMAC and SMC911),
> USB (EHCI_OMAP).
> 
> Signed-off-by: Stefano Babic <sbabic at denx.de>
> CC: Tapani Utrianen <tapani at technexion.com>
> CC: Tom Rini <tom.rini at gmail.com>
> CC: Sandeep Paulraj <s-paulraj at ti.com>
> ---
>  MAINTAINERS                        |    1 +
>  board/technexion/twister/Makefile  |   44 ++++
>  board/technexion/twister/twister.c |  126 +++++++++++
>  board/technexion/twister/twister.h |  400 ++++++++++++++++++++++++++++++++++++
>  boards.cfg                         |    1 +
>  include/configs/twister.h          |  103 +++++++++
>  6 files changed, 675 insertions(+), 0 deletions(-)
>  create mode 100644 board/technexion/twister/Makefile
>  create mode 100644 board/technexion/twister/twister.c
>  create mode 100644 board/technexion/twister/twister.h
>  create mode 100644 include/configs/twister.h

[...]

> diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c
> new file mode 100644
> index 0000000..89a4d81
> --- /dev/null
> +++ b/board/technexion/twister/twister.c

[...]

> +/*
> + * Routine: board_init
> + * Description: Early hardware init.
> + */
> +int board_init(void)
> +{
> +	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
> +
> +	/* boot param addr */
> +	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
> +
> +	writel(0x00000000, &gpmc_cfg->cs[1].config1);
> +	writel(0x001e1e01, &gpmc_cfg->cs[1].config2);
> +	writel(0x00080300, &gpmc_cfg->cs[1].config3);
> +	writel(0x1c091c09, &gpmc_cfg->cs[1].config4);
> +	writel(0x04181f1f, &gpmc_cfg->cs[1].config5);
> +	writel(0x00000FCF, &gpmc_cfg->cs[1].config6);
> +	writel(0x00000f61, &gpmc_cfg->cs[1].config7);
> +
> +	writel(0x00000000, &gpmc_cfg->cs[3].config1);
> +	writel(0x001e1e01, &gpmc_cfg->cs[3].config2);
> +	writel(0x00080300, &gpmc_cfg->cs[3].config3);
> +	writel(0x1c091c09, &gpmc_cfg->cs[3].config4);
> +	writel(0x04181f1f, &gpmc_cfg->cs[3].config5);
> +	writel(0x00000FCF, &gpmc_cfg->cs[3].config6);
> +	writel(0x00000f63, &gpmc_cfg->cs[3].config7);

Can there be an explanation of what's that and why is it needed?
Also, it looks like you are writing the same values to both chip selects.
Can enable_gpmc_cs_config() function be used here as well and
the values documented (e.g. NET_GPMC_CONFIGx)?

[...]

-- 
Regards,
Igor.